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February 2021

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Wed, 24 Feb 2021 14:35:43 +0000
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All of the hole position dimensions and the artwork and their tolerances (with respect to a 0.00/0.00 datum reference) are typically documented on the bare board (fabricated PWB) drawing, seldom on the assembly drawing. Most of these are typically +-.002" or +-.003"
You should be able to perform a worst-case tolerance stack-up analysis using only the PWB drawing and the connector's vendor print tolerances (both male and female).
As far as the mating goes, if you can prove through the tolerance analysis that your female connector sockets/contacts will always have the full engagement of the male pins, ie, the pin protrudes past the contact points, you should be OK.
You will probably find that the female contact point dimensional tolerance to the faying surface of the connector and the Y dimension tolerance of the PWB connector holes with respect to the mounting holes are your focus. You really don't care too much about the positioning tolerance in the X plane (side-to-side with respect to the connector's long axis), as that is usually more forgiving when the male/female halves of the connector are mated manually, using the jackscrews as a guide. What you are focusing on is: When mated, will the male pins always be past the contact point?


-----Original Message-----
From: TechNet <[log in to unmask]> On Behalf Of Vargas, Stephen M
Sent: Wednesday, February 24, 2021 8:00 AM
To: [log in to unmask]
Subject: [TN] PCB Question

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External E-mail --- CAUTION: This email originated from outside GDMS. Do not click links or open attachments unless you recognize the sender and know the content is safe.

Good morning, a question arose where I need some help. We have a PCB which mounts into a chassis then mates to another board in the same chassis via a right angle male header to a female connector. The issue is that the male connector does not protrude fully into the female connector. We know the issue is that the spacing between the two boards is incorrect, but we'd like to do a full dimensional tolerance analysis to determine the optimal spacing. One question that arose which I cannot answer and I'm hoping to get some assistance with, is related to the PCB artwork to PCB tooling hole registration/tolerance. I did a quick look through many of the IPC board specifications, but wasn't able to find anything. I'm thinking my searching skills are waning, so I'd like to get some help from this group. Thanks in advance.

Regards,
Steve Vargas

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