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Date: | Thu, 28 May 2020 17:54:19 +0100 |
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Jack,
It is drilled to 8 mil and finished at 6.
Thanks,
Larry
From: Jack Olson <[log in to unmask]>
Sent: Thursday 28 May 2020 17:53
To: Larry Brophy <[log in to unmask]>; TechNet <[log in to unmask]>
Subject: Re: [TN] IPC Class 2 v 3
don't forget, there is a difference between the drill size and the finished plated hole diameter.
(just trying to help)
On Tue, May 26, 2020 at 12:34 PM <[log in to unmask] <mailto:[log in to unmask]> > wrote:
Jack,
My PCB supplier can drill to 6 mil with a tolerance of +/-2mil. That allows me to have a pad of 14mil and meet the minimum of 2mil outer annular ring for IPC-6012 Class 3.
I could use laser microvias and buried vias but there is a significant cost going that way.
My preference is to use a 6mil drilled via but I'm not sure that will qualify for Class 3.
Anyone know if there are exemptions that allow a 6mil via for Class 3.
Thanks all,
Larry
-----Original Message-----
From: TechNet <[log in to unmask] <mailto:[log in to unmask]> > On Behalf Of Jack Olson
Sent: Tuesday 26 May 2020 18:24
To: [log in to unmask] <mailto:[log in to unmask]>
Subject: Re: [TN] IPC Class 2 v 3
On Fri, 22 May 2020 16:54:20 +0100, Larry Brophy <[log in to unmask] <mailto:[log in to unmask]> > wrote:
>
>Sorry I have another question and it is again to do with what you have
>said , it is a conflict between the two specifications.
>We need to use a micro BGA. Based on our PCB manufactures capabilities
>in the BGA area we need to use a blind via drilled at 6mil with a 14mil
>pad to guarantee a 2mil annular ring.
>But IPC-2221 states that the smallest blind via is 8 mil. Table 9-4.
>This is just another design guide v IPC-6012 issue?
I thought Table 9-4 referred to the minimum mechanically DRILLED hole size, (laser can be smaller diameter?) but after reviewing the document, it does not seem clear to me.
(good question, but I only have the 2221C Working Draft OCT2013 to look at right now)
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