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January 2019

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Subject:
From:
"lduso - Diamond-MT.com" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, lduso - Diamond-MT.com
Date:
Wed, 16 Jan 2019 09:36:14 -0500
Content-Type:
text/plain
Parts/Attachments:
text/plain (36 lines)
Unless a customer specifically addresses the need, we do not reject coating
defects on flat, unencumbered areas of the board substrate. Minor dewetting
or bubbles there or even on top of components is not generally regarded as
a defect. A process indicator at best. We focus on the coverage of metallic
leads, vias, etc. If there are large amounts of dewetting, we try to help
identify the cause. It may be a surface energy issue but most common is
some sort of residue. Feel free to contact me if you want to discuss
further.

Lloyd Duso
General Manager
Diamond-MT
(814) 535-3505
www.Diamond-mt.com


On Tue, Jan 15, 2019 at 12:22 PM Jack Olson <[log in to unmask]> wrote:

> Thank You.
> I would also be interested to know for inspection purposes - although it is
> common for the whole board to be coated (except for masked areas of
> course), should we only raise the red flag for exposed components and
> conductive areas? I realize that the coating PROCESS may make it easier to
> coat everything, but if there is a missed spot that is just bare board, is
> it a FAILURE? How do other people document this?
> (I'm new to this subject. Well, to be more accurate, I've been conformal
> coating for decades but never had detailed discussion about it until
> recently. Hoping to avoid complicated documentation)
>
> On Thu, Jan 10, 2019 at 3:36 PM Jack Olson <[log in to unmask]> wrote:
>
> > Is it more common to conformal coat unplated mounting holes?
> > or designate a clearance diameter on the assembly drawing?
> >
>

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