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December 2018

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Subject:
From:
Yuan-chia Joyce Koo <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Yuan-chia Joyce Koo <[log in to unmask]>
Date:
Fri, 14 Dec 2018 23:28:19 -0500
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text/plain
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text/plain (34 lines)
via fill by design usually either power requirement (or ground), or  
thermal distribution requirements.  failure related to incomplete via  
fill usually can be observed as thermal effect (via separation upon  
thermal cycle for example, chip ground thermal failure = hot spot,  
etc.etc.).  failure related to power requirement is hard to spot -  
usually, it is catastrophic failure, you lost the evidence of  
incomplete via fill... hard to tell if solder heated up reflowed out  
of via or wasn't there at 1st place for example).  If there are many  
ground planes in the via connection, return might be an issue - hard   
to tell.  IMHO.  It depends what the via for  and your PWB intended  
use (for example,  used it in a watch possibly it is not that  
important - but the design possibly wouldn't call out for via fill  
any how).  my 1.42 cents.
jk
On Dec 14, 2018, at 7:42 PM, Rivera, Raye wrote:

> Hello all,
>
> I've recently had some PCBs rejected for incomplete via fill. This  
> would be in 8 mil vias, aspect ratios between 9.5 and 10.3, to be  
> filled and plated over.
>
> I realized I have no idea why, or if, it is a good idea to fill vias.
>
> Is anyone aware of PCB failures due to incomplete via fill?
>
> And finally, is anyone else have trouble searching the Technet  
> archives? I used to get good information that way, but now all my  
> searches return zero results.
>
> Best regards,
> Raye Rivera
> Quality Manager

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