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From:
"Stadem, Richard D" <[log in to unmask]>
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TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D
Date:
Wed, 12 Sep 2018 12:38:10 +0000
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The source of the definition for me is IPC-T-50H which for many years has defined fine pitch technology (FPT) as being an SMT assembly with component terminations on less than 0.65mm [0.025] centers.



Does the definition really matter? Who decides?



-----Original Message-----

From: TechNet [mailto:[log in to unmask]] On Behalf Of Wayne Showers

Sent: Tuesday, September 11, 2018 3:04 PM

To: [log in to unmask]

Subject: Re: [TN] PTH Fine-Pitch Definition



For what it's worth:

A fine-pitch package can be broadly defined as any package with a lead pitch finer than the 1.27mm pitch of standard surface mount packages like Plastic Leaded Chip Carriers (PLCC’s) and Small Outline Packages (SOP’s). Most common lead pitches are .65mm and .5mm.  There are even some now available in 0.4mm pitch. Devices with these fine pitches and leads on all four sides are called Quad Flat Packs (QFP’s).       Intel® Manufacturing Enabling Guide 1-7  May 2010



A little dated, but the source of the fine-pitch definition.



For a last look, I would use 0.5mm and 2mm respectively if you are needing a dividing line for internal measurement.  But as you original problem stems as much from pad-to-pad spacing as it does lead spacing, this would be best expressed as less than 0.20mm pad spacing for SMT and 0.50mm pad spacing for through-hole.  


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