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Subject:
From:
Yuan-chia Joyce Koo <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Yuan-chia Joyce Koo <[log in to unmask]>
Date:
Wed, 15 Aug 2018 17:30:18 -0400
Content-Type:
text/plain
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text/plain (172 lines)
two reasons the cap crack (or any ceramic glass parts) near the V- 
score line are "new" - (1)  lead free solder is harder than Pb/Sn -  
stronger - that made components the weakest fracture point (2) the  
designer uses auto route - put those fragile parts near the edge  
without thought of MFG - and some board are thicker, or panel are  
bigger, or ground extended to edge (or surface ground for thermal  
reasons) - that causes stress (mostly in bending) upon cutting or de- 
panel - even some poorly layout board got potato chip wrap can  
fracture the cap.  you can put dummy parts near the edge and pot  
using low force epoxy and send though the cutting process, if it is  
open (the epoxy contact break) or missing components, you have too  
high stress in that area... you can also follow one of the dotcom age  
paper (can't remember the author or title, not even the conference  
where I saw it), use fiber grating mount near the edge  and do a  
dynamic monitoring of the force upon cutting process (singulation) -  
I believe it was done on components - MCM with de couple cap... long  
time ago... interesting - you get more "scientific" results -  
absolute reading and comparison of different singulation methods....  
(not only for decouple caps, but for screen on laser trimed resistor  
too).  fyi only.
jk
On Aug 15, 2018, at 3:36 PM, George Wenger wrote:

> Carl is correct that the scariest part of this problem is that it  
> may not be evident for a while.  Years ago we had a problem with  
> circuit packs were failing in and when they were returned there was  
> usually a blown chip capacitor near the edge of the board.  It took  
> quite a while to resolve this issue but eventually it was realized  
> that the capacitors that were blown were perpendicular to the edge  
> of the board and the boards usually failed during or just after a  
> severe thunderstorm or rain storm (i.e., failed during a high  
> humidity event).   The cause was flexure cracks in the capactor  
> ends.  The cracks didn't change the capacitance value very much  
> because they were only near the termination end.  When they cracked  
> they would not short the internal layers because they would "Crack  
> Open".  However when humidity got into the crack it would cause a  
> short between internal layers and pop goes the cap.
>
> When the cause was discovered we modified our design guide lines of  
> how close capacitors could be placed near an edge.  More  
> importantly we instituted a new test before any new design could be  
> placed in the field.  The new test was really a modification of an  
> old test.  We would expose a new design to 85C/85%RH for 24 hours  
> but rather than bake the boards after the temperature humidity test  
> we would test the boards immediately after removal from the  
> humidity testing and sure enough if there was a cracked capacitor  
> it would pop when powered up because there was humidity in the  
> crack causing a short.
>
> George (Retired FMA Engineer)
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Carl Van Wormer
> Sent: Wednesday, August 15, 2018 2:46 PM
> To: [log in to unmask]
> Subject: Re: [TN] EXTERNAL: Re: [TN] MLCC spacing/orientation to V- 
> score or Perforated Tabs
>
> The scariest part of this problem (caps cracked from depaneling  
> forces) is that the problem may not be evident for a while.  A  
> production run of 100 boards passed all our outgoing tests, even  
> though the 12V power input filter (ferrite bead and ceramic cap,  
> both 0603) were near the board edge.  The cap orientation was  
> perpendicular to the board edge, with one end spaced 0.10" from the  
> edge.  We had 6 units come back as field failures within the first  
> 3 months of shipping.  The ferrite bead burned the board (and  
> damaged the pads) after the cap shorted to ground in the customer's  
> environment.
>
> We did a quick re-design of the board, rotating the cap and moving  
> it to about 0.23" from the board edge.  After several hundred of  
> the "fixed" units were shipped, we've seen no failures of the newer  
> layout boards.
>
> Later,
> Carl
>
>
>
>
>
> Carl B. Van Wormer, P.E., AE7GD
> Senior Hardware Engineer
> Cipher Engineering LLC
>     21195 NW Evergreen Pkwy Ste 209
>     Hillsboro, OR  97124-7167
>     503-617-7447x303
>     [log in to unmask]     http://cipherengineering.com
>
>
> -----Original Message-----
> From: TechNet <[log in to unmask]> On Behalf Of Drew meyer
> Sent: Wednesday, August 15, 2018 12:36 PM
> To: [log in to unmask]
> Subject: Re: [TN] EXTERNAL: Re: [TN] MLCC spacing/orientation to V- 
> score or Perforated Tabs
>
> Wayne,
>
> We have used the pizza cutter style as well and it can induce some  
> strain on the board, more than you might think possible.  The depth  
> of the V-score can vary and the wheels may not track exactly down  
> the middle of the V-score.  In one case the V-score depth varied  
> enough that the wheel walked out of the groove and into the PCB.   
> Scrap that panel!!!!
>
> A well maintained router is the best method.  But as you can see  
> above, even here it is not applied to every product.
>
> Drew
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Wayne Thayer
> Sent: Wednesday, August 15, 2018 10:20 AM
> To: [log in to unmask]
> Subject: Re: [TN] EXTERNAL: Re: [TN] MLCC spacing/orientation to V- 
> score or Perforated Tabs
>
> Thanks Scott.
>
> I'll see what I can divine from CALCE.
>
> I have a hard time imagining the "stress lines" for the V-score  
> (aka "Pizza
> Wheel") singulation process. With tabs, bending is clearly the way  
> shock waves propagate, so you'd think aligning parts with the long  
> access parallel to the edge would be the orientation for minimal  
> differential stress. But the "Pizza Wheel" is trying to rip the  
> board apart in a very different way. I'm suspecting the stress  
> waves would be of similar shape to the waves around the bow of a  
> canoe when you're moving through the water:
> They start out as propagating in the same direction as the bending  
> waves, but end up turning nearly 90 degrees as the wheel wedges the  
> board apart.
> Probably CALCE has modeled that.
>
> Wayne Thayer
>
> On Wed, Aug 15, 2018 at 7:47 AM Decker, Scott UTAS <  
> [log in to unmask]> wrote:
>
>> Wayne,
>>     We have requirements here also regarding the location of MLCC's
>> near the edges and areas of stress, like mounting holes, mouse bites,
>> scoring, etc. and the electrical engineers are urged to use flexy
>> leaded type caps when possible. Like Steve mentioned, .200" from a  
>> lot
>> of things mentioned is a good start along with orientation of the
>> components along the stress lines, etc. We also have restrictions on
>> the soldering of boards with MLCC's on them as far as temp rise rate
>> to avoid thermal shock. This is also related to the size and  
>> soldering type used, wave or re-flow.
>> Something that might help also is to check into The Center For
>> Advanced Life Cycle Engineering which is a research center at the
>> University of Maryland. They have a calculator that you can use to
>> help predict cracking issues with the parts. I can't share exact
>> numbers and other related information without congressional approval
>> from people I don't even know, but I will say that the .200"  
>> number is
>> pretty good and Steve said the same thing. These parts have really
>> been a thorn in the side for designs with always having to  
>> remember which way, and how far, etc. but it is what it
>> is... :-/   Good luck.
>> Later...
>>
>> Scott Decker – Staff Engineer, PCB Design Services CID+ – Electronic
>> Systems Center UTC AEROSPACE SYSTEMS
>> 3445 S. 5th Street, Suite 170, Phoenix, AZ 85040 U.S.A.
>> Tel: 602 308 5957  FAX: 602 243 2347
>> KE7MWT  AKA:PadMasterson
>> [log in to unmask]   www.utcaerospacesystems.com

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