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July 2018

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Subject:
From:
Ramon Essers <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Ramon Essers <[log in to unmask]>
Date:
Wed, 18 Jul 2018 17:49:14 +0200
Content-Type:
text/plain
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text/plain (40 lines)
Hello Eray,

According to the policies and procedures document, you have to contact your CIT or MIT.
This would be your first line contact for questions about IPC-A-610!

Regards, Ramon

(Send on The road with iPhone)

> Op 18 jul. 2018 om 17:40 heeft SALA GABRIELE <[log in to unmask]> het volgende geschreven:
> 
> Hi Eray,
> 
> your interpretation is correct.
> 
> Gabriele
> 
> -----Messaggio originale-----
> Da: TechNet [mailto:[log in to unmask]] Per conto di Eray CANLI
> Inviato: mercoledì 18 luglio 2018 15:59
> A: [log in to unmask]
> Oggetto: [TN] IPC-A-610 Board-in-Board Class 3 Acceptability
> 
> Dear TechNetters,
> 
> This is my first post on TN, and it is nice to be part of this list.
> 
> I have a confusion on "Supported Holes - Board in Board" part of IPC-A-610 document. How should we interpret the statement "No board in board criteria have been established for Class 3 assemblies". Not sure if IPC forbids board-in-board solder assembly in Class 3.
> 
> Should we avoid vertical assembly of boards to each other (without
> connector) in Class 3 designs, or develop our own acceptability criteria?
> 
> Thanks in advance!
> Eray CANLI
> 
> 
> ---
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