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March 2018

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Subject:
From:
Yuan-chia Joyce Koo <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Yuan-chia Joyce Koo <[log in to unmask]>
Date:
Fri, 23 Mar 2018 17:12:41 -0400
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you mean make up particles?  it took some convincing for ladies not  
wear make up... (you really can't check under the smarch ;-)
On Mar 23, 2018, at 2:20 PM, Wayne Thayer wrote:

> Hi Syed-
>
> Production in flip chip went down to 175 micron several years ago.  
> That was
> enough at the time that the substrates became limiters. As Joyce  
> says, the
> substrate technology is critical--not just line x space resolution,  
> but via
> pitch and flatness. Silicon on silicon is probably significantly more
> dense. Keep in mind that the smaller the contact area, the more  
> cleanliness
> plays a role. At 200 micron and below pitches, cleanroom is a must  
> and I
> would have operators wear masks: An eyelash hair is around 100  
> microns in
> diameter! And then there is spittle, etc.
>
> Wayne Thayer
>
> On Thu, Mar 22, 2018 at 9:07 AM, Ahmad, Syed <[log in to unmask]>  
> wrote:
>
>> We are trying to determine limits on solder or other interconnects  
>> for a
>> high pin count prototype and need help in identifying suppliers for
>> solders, stencil manufacturers, ACAs, ACFs and other options that  
>> may help
>> us achieve lowest pitch interconnects. All help is welcome. Thank  
>> you for
>> your assistance. Suppliers may contact me directly on my email.
>>
>> Syed Sajid Ahmad,
>> Research Staff, ECE, NDSU
>> Cell 701-200-1674
>>

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