i was told by one of the Sr. engineer - chaps learn better with their  
own mistake... (if they survive with their mistake).  - so my rule is  
maximum voice once, written down once and only if mission critical,  
additional raise issue with some aspirin dose prior to the meeting to  
reduce blood pressure ;-).
On Mar 5, 2018, at 12:47 PM, Jack Olson wrote:

> I hear ya, brother. and don't think I am arguing with the value of  
> doing
> the work,
> but (here I go anyway)
> One of the major benefits of having the IPC in our industry is that  
> every
> new circuit board designer that comes along, who doesn't know  
> whether to
> put that note on his fabrication drawing or not, can learn from the
> experience of others here. He doesn't have to repeat expensive  
> tests just
> to verify what is already understood by the consensus of other  
> members that
> have already contributed time and effort and resources to study the  
> issue.
> (but I hear ya!)
>
> Jbro
>
> On Mon, Mar 5, 2018 at 10:51 AM, Dwight Mattix  
> <[log in to unmask]>
> wrote:
>
>> Yeah, I blew past the thread to busy to contribute last week.
>>
>> All else being equal retaining non-functional pads tends to  
>> increase time
>> to barrel wearout from circumferential cracking at/near the  
>> midline.  One
>> notion being that the pads make for a local lower resin content  
>> region
>> around the via (less expansive dielectric acting on the copper  
>> column to
>> wear it out).
>>
>> Non-func pads don't seem to have much bearing on the actual post
>> interconnect reliability.  Multiwire anyone?  (speaking of  
>> dinosaurs).
>>
>> But back to the barrel wearout thing...  All things are rarely  
>> equal. So
>> if you actually build it and test it (due diligence? That's crazy  
>> talk. Who
>> has time or money for that anymore?), I'd wager you'll get mixed  
>> results.
>>  A lot depends on factors like the fabricator's drilling and hole  
>> prep
>> skill, the aspect ratio, material involved, copper weights of the  
>> included
>> NF-pads etc.
>>
>> Leaving non-func pads in, increases the drilling challenge. That  
>> increases
>> things that disrupt the hole and factor in to it's ultimate  
>> reliability.
>> For example, a rougher hole wall is very likely to be part of the  
>> effect of
>> leaving NF pads in. That introduces stress risers in the holewall
>> topography that can accelerate copper wearout and crack propogation.
>>
>> So all of that say the original question, "It depends."   :)
>>
>> Do your due diligence. If it really matters, build it and test it.  
>> Better
>> yet, build it both ways and test it. Even better, build both ways  
>> at more
>> than one fab and test it.  You'll be illuminated and smarter at  
>> the end of
>> the exercise than 99 of 100 veteran pwb tech people seen walking  
>> the floor
>> with tacky polo shirts, broken down posture and done-lops last  
>> week at
>> IPC/APEX.
>>
>> cheers,
>> dw
>>
>> -----Original Message-----
>> From: TechNet [mailto:[log in to unmask]] On Behalf Of Jack Olson
>> Sent: Monday, March 5, 2018 7:49 AM
>> To: [log in to unmask]
>> Subject: Re: [TN] Non Functioning pads
>>
>> I must be behind-the-times on this one.
>> Werner Englemaier used to talk about this all the time, and from  
>> my memory
>> an analogy might be similar to comparing a simple rivet to a  
>> "rivet with
>> ribs". If your goal is a robust product (which a lot of Class 3's  
>> are) then
>> it seems like you would want the extra support. (I'm not making a
>> statement, I'm repeating what I was taught). I'm pretty sure I've  
>> heard
>> Gary Ferrari recommend keeping them in at least a half a dozen  
>> times in his
>> seminars. Aren't the most common failures in boards related to vias?
>>
>> Maybe I have more learnin' to do on this one, but I'm surprised  
>> that NO
>> ONE responded in favor of keeping the unconnected internal pads
>>
>> Well, since we are talking about vias, I was also advised to  
>> require 1mil
>> hole wall plating, even though the standard is 0.8 (I think). But  
>> for the
>> same reason, the stronger we can make our vias, the less "most  
>> common"
>> failures we will have, right? (At Caterpillar, we want the most  
>> robust
>> product we can get for the money) Am I sounding like an old  
>> dinosaur now?
>>
>> but really, is EVERYONE removing unconnected inner layer pads?
>> Is "increasing the longevity of drill bits" the dominant theme now?
>>
>> onward thru the fog,
>> Jack
>>
>>
>> .
>> On Tue, 27 Feb 2018 11:12:22 -0600, Larry <[log in to unmask]>  
>> wrote:
>>
>>> Is there any reason I cannot remove non functioning pads on the  
>>> inner
>> layers for an Class 3 PCB?
>>>
>>> Many thanks,
>>>
>>> Larry
>>