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March 2018

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From:
"Stadem, Richard D" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D
Date:
Tue, 6 Mar 2018 13:06:57 +0000
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Wayne, thank you for the effort and the information you are working on. It will prove valuable to the industry as a whole.

Dave, I understand this information from the group will end up in the proposed BTC guidelines, but that is primarily going to function as a manufacturing process guideline. Do you think some of the pad layout information (stencil design info, etc) should be also directed into one of the Design standards as well? What good does it do to tell the MEs what percent of voiding, etc, is acceptable, but not tell the Design group how to avoid the voids in the first place?



-----Original Message-----

From: TechNet [mailto:[log in to unmask]] On Behalf Of Wayne Showers

Sent: Monday, March 05, 2018 3:51 PM

To: [log in to unmask]

Subject: Re: [TN] Bottom Termination Components (BTC) Voiding Limits



Dave et al,

You can add me to the list of companies that will provide voiding data.  I am data mining variations of the print pattern to reduce voiding and I am in the process of marrying up stencil design to void and fill percentages.



I can echo the voiding request from Blackberry.  The original request was 90% coverage and no more than 3 voids with no single void greater than 5%.  Even to get to the 70%, I ended up using a custom solder slug and still had voiding due to via in pad.



I would like to see a standard that reflects something similar to the following:

Class 1: Undefined

Class 2: Shall be 50% coverage with no single void exceeding X% or as defined by customer or part manufacturer.

Class 3: Shall be 70% coverage with no single void exceeding X% or as defined by customer or part manufacturer.

Note 1: Customer Requirements supersede

Note 2: Manufacturer Recommendations/Requirements supersede Note 3: VIA in Pad and other design factors shall be considered and evaluated if criteria cannot be met.


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