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January 2018

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Subject:
From:
Bob Wettermann <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Bob Wettermann <[log in to unmask]>
Date:
Mon, 8 Jan 2018 11:51:00 -0600
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Once the criteria is determined for the max voiding percentage the most
common suspects we have found, from a process standpoint  are:

1. Type of paste / flux chemistry

2. Thermal Profile

3. Printing reduction in the center ground - ie the print pattern

Certainly vias in the pad will cause the situation to be very complicated
as well will very large center ground patterns relative to the part size.

Bob Wettermann


On Mon, Jan 8, 2018 at 10:26 AM, Guy Ramsey <[log in to unmask]> wrote:

> We are having trouble with a lot of boards.
> We are seeing excessive voids like the ones on page 18 of this
> presentation.
>
> https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&ved=
> 0ahUKEwj27JnJ38HYAhUF5YMKHWYICvcQFggpMAA&url=https%3A%2F%
> 2Fwww.eptac.com%2Fwp-content%2Fuploads%2F2012%2F06%2Feptac_
> 07_18_12.pdf&usg=AOvVaw2OX6J_YRqkuNUNNgDBvmwZ
>
>
> The vias are filled and plated. Anyone seen this, resolved it?
>
>
> Guy
>



-- 
Bob Wettermann
BEST Inc
[log in to unmask]
Cell: 847-767-5745

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