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Subject:
From:
SALA GABRIELE <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, SALA GABRIELE <[log in to unmask]>
Date:
Fri, 1 Dec 2017 12:09:56 +0100
Content-Type:
text/plain
Parts/Attachments:
text/plain (131 lines)
Inviato: venerdì 1 dicembre 2017 10:30
A: 'TechNet E-Mail Forum'; 'Yuan-chia Joyce Koo'
Oggetto: R: [TN] IPC Standard, bare board vendor markings

HI
As already stated by previous posts:

IPC-6012 D   3.3.5  Marking... give useful guidelines  it recalls also
IPC/J-STD-609 B also a very good guide lines similar (Joint Std) to IEC
62588 Marking and Labeling, etc . BTW  the "driver" are always the product
and drawings specifications defined in the contract..

Gabriele
-----Messaggio originale-----
Da: TechNet [mailto:[log in to unmask]] Per conto di Yuan-chia Joyce Koo
Inviato: venerdì 1 dicembre 2017 01:50
A: [log in to unmask]
Oggetto: Re: [TN] IPC Standard, bare board vendor markings

you should not standardize the note.  common usage- yes.  but not
standardize - too many new requirements for new product...(5G is comming).
If you standardize the dwg note, there is no wirebondable gold come out for
example (all MIL std...).  IMHO.  So many hi-Rel product required specific
dwg notes, for example, chip on board, didn't have std dwg note until almost
10-15 years later... (possibly still don't have std dwg note).
jk
On Nov 30, 2017, at 5:03 PM, Steve Golemme wrote:

> All the notes are to supplement the standards.
>
> Have there been any efforts to standardize note options? I know it's 
> something I've done almost everywhere I've worked.
>
> Regards,
> Stephen Golemme
> Manufacturing Engineer
> 650-214-5647
> x.company
>
> On Thu, Nov 30, 2017 at 1:49 PM, Jose A Rios <[log in to unmask]> wrote:
>
>> Neither UL markings nor stackup markings are IPC requirements.  
>> Again go to
>> 6012D section 3.3.5; its outlined there.
>>
>> Sent from my iPhone
>>
>> On Nov 30, 2017, at 4:11 PM, Stadem, Richard D <Richard.Stadem@GD- 
>> MS.COM< mailto:[log in to unmask]>> wrote:
>>
>> It doesn't necessarily have to be. Fabrication drawing notes, and 
>> notes on the assembly drawing normally take precedence over industry 
>> standards, as they are product-specific.
>> The fab drawing and the assembly drawing are the "Bible" thou shalt 
>> go by if there is a conflict. The exception to the order of 
>> precedence is generally something in the contract.
>>
>> -----Original Message-----
>> From: TechNet [mailto:[log in to unmask]] On Behalf Of 
>> [log in to unmask]<mailto:[log in to unmask]>
>> Sent: Thursday, November 30, 2017 2:13 PM
>> To: [log in to unmask]<mailto:[log in to unmask]>
>> Subject: Re: [TN] IPC Standard, bare board vendor markings
>>
>> Dell - Internal Use - Confidential
>>
>> Is this statement supported (referenced) in an IPC/Industry Standard?
>>
>> Victor,
>>
>> -----Original Message-----
>> From: TechNet [mailto:[log in to unmask]] On Behalf Of Steve Golemme
>> Sent: Thursday, November 30, 2017 2:07 PM
>> To: [log in to unmask]<mailto:[log in to unmask]>
>> Subject: Re: [TN] IPC Standard, bare board vendor markings
>>
>> We deal with power boards and sealing surfaces. The note I've had 
>> success with is:
>>
>> SUPPLIER SHALL MARK STACKUP AND DATE CODE, SUPPLIER NAME AND/OR 
>> TRADEMARK, AND UL FLAMMABILITY RATING IN NON-CONDUCTIVE INDELIBLE INK 
>> (COLOR WHITE OR BLACK). SUPPLIER SHALL NOT ADD ANY TEXT OR MARKING IN 
>> COPPER.
>>
>> Stephen Golemme
>> Manufacturing Engineer, Makani
>> 650-214-5647
>> solveforx.com/makani<http://solveforx.com/makani>
>>
>> On Thu, Nov 30, 2017 at 11:56 AM, Jose A Rios <[log in to unmask]<mailto:
>> [log in to unmask]>> wrote:
>>
>> Silk screen (or etched metal) are acceptable forms of marking.
>> Requirements for marking are basically legibility and traceability 
>> (you basically have to be able to match the conformance coupons to 
>> the boards they represent), by some method of serialization, which 
>> shall include date code. UL marking is not an IPC requirement, if 
>> required the board user must specify it. When using etched metal as 
>> marking, it shall not violate min spacing to board conductors (same 
>> with conductive inks). See 6012D 3.3.5 and its subsections.
>>
>>
>> José (Joey) Ríos, Sr QA Engineer
>> Mission Assurance Manager
>> Kavli Institute for Astrophysics & Space Research Massachusetts 
>> Institute of Technology [log in to unmask]<mailto:[log in to unmask]>
>> <mailto:
>> [log in to unmask]>
>> (617)324-6272
>>
>>
>>
>> On Nov 30, 2017, at 2:42 PM, [log in to unmask]<mailto:
>> [log in to unmask]> wrote:
>>
>> Fellow TechNetters:
>>
>> IPC-1066 covers Lead free markings/Symbols/:Labels, etc.   Which IPC
>> Standard covers bare board vendor logo/UL Rating/markings/production
>> date/REV and layer counts.   Is silk screening printing of  
>> information
>> acceptable beside etch from original external copper foil.
>>
>> Victor,
>>


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