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October 2017

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Subject:
From:
Yuan-chia Joyce Koo <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Yuan-chia Joyce Koo <[log in to unmask]>
Date:
Wed, 18 Oct 2017 10:44:17 -0400
Content-Type:
text/plain
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text/plain (58 lines)
you didn't see that from your vendor qualification unit?  does  
thermal stress is part of vendor qual?  does your contract said  
comply to ipc and equivalent to qual unit (equivalent or better)?   
did you change material/process? (CTE of filler material)... do you  
have sample saved from your qual  batch as witness sample, so you can  
go back to your vendor?  (normally qual unit add 2x reflow cycle, for  
example: top 2x, bottom 1x plus rework 1x - 4x +2 for qual... if you  
don't see any issue on qual unit, you go for production... that  
including thermal shock 10x check for discontinueity... fully  
populated unit).
90% of pad lift is major flaw, unless you did something strange, that  
not covered  in initial  qual (or your vendor is really crappy...  
good one will work with you and find out what hack is gone  wrong and  
make sure  no other customer see the same  fault).
jk
On Oct 18, 2017, at 10:22 AM, Zilber Gil wrote:

> Fellow TechNetters:
>
> I have a problem of lifted land (via`s pad) after reflow. More the  
> 90% of the pads show it on both sides of the PCB (Vias are filled  
> and cap plating).
> According to IPC lifted land after thermal stress is allowed.
> In many cases, a conductor is connected to these pads and in this  
> case, the reliability of the connected area to the lifted pad is  
> probably very poor (most of the PCBS worked after the assembly, but  
> one show discontinuity. Many vias are under BGAs connected as a dog  
> bone to the BGA pads).
> I contacted the manufacturer and he told me that the PCBs are ok  
> according to IPC thus they will not compensate us.
>
>
> Now I have a few questions:
> 1. IPC did not mention any conductor connected to these pads, why?  
> What about reliability issues in this case (obviously poor?)?
> 2. Do I have any case against the manufacturer?
> 3. At IPC 6012 and Mil-prf-55110 lifted land refer to the pad of  
> the vias, but it is not verbally written. It is showed on the  
> pictures (at the MIL). Thus, one can interpret that lifted land,  
> i.e. component pad, can be lifted from the board and it is  
> acceptable...?? (imagine a BGA "jumping" up and down during  
> vibration... :)
> 4. After that issue, I am going to change our spec and not allowed  
> any lifted land (before or after thermal stress).
>
> Thank you for your inputs,
>
> Gil Zilber
> Elta Systems Ltd.
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