TECHNET Archives

June 2017

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Wayne Thayer <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Wayne Thayer <[log in to unmask]>
Date:
Thu, 15 Jun 2017 20:58:45 +0000
Content-Type:
text/plain
Parts/Attachments:
text/plain (1 lines)
Thanks, Bob.



I tend to look at it more as needing a low impedance path to the power supply. If the local supply is a capacitor, then the impedance goes down with increasing frequency until the point where the capacitor is in resonance with whatever inductance is in series with it (all the way from the MOSFET implementation on the silicon die, so bond wires are included). Rather than use the distance rule of thumb below, I recommend you look at the first resonance of the bypass system, and you would like that to be above the frequency content in the edges of the switching waveforms. When you view the world that way, you might start moving the bypass closer to the pin leads again!



Note that if 3 inches is 1/14 of a wavelength, That is a 42" wavelength, for a frequency of around 370 MHz, or the edges of a waveform that is switching in the vicinity of 80MHz. Using your 1/40 value, that would go down another factor of 3. Most of us deal with faster systems than that.



Wayne



-----Original Message-----

From: Robert Kondner [mailto:[log in to unmask]] 

Sent: Thursday, June 15, 2017 1:42 PM

To: 'TechNet E-Mail Forum'; Wayne Thayer

Subject: RE: [TN] Diving into Embedded Capacitance



Wayne,



 I often think of it not as how much capacitance you want but as how much inductance you don't want.



Once you get to a plane the inductance is quite small especially compared to the wires running from a parts out onto a PCB. 



I think it was an Intel or Xilinx app note  that read caps anywhere within 1/14 (or was it 1/40) of a wavelength was basically a lumped node. And that is 2 or 3 inches or so. So when designers wants a bypass cap moved 100 mils closer to pin leads they are not thinking.  Actually the inductance of the caps is not trivial but consider some of the long bonding wires in a large IC. 



The worst case story I heard was from Intel where a processor comes out of sleep. Power usage goes from almost 0 to 60 watts or more. The caps in the DC converters feeding the low voltage rails need to hold up voltages while the DC converters ramp up. Lots of amps for a short time. Not an EMI related issue just a pure uf / ESR and ESL issue.



Bob K.





-----Original Message-----

From: TechNet [mailto:[log in to unmask]] On Behalf Of Wayne Thayer

Sent: Thursday, June 15, 2017 4:03 PM

To: [log in to unmask]

Subject: Re: [TN] Diving into Embedded Capacitance



Hi Pete-



A number of years ago, DuPont was hawking a version of very thin copper clad polyimide with a product name like "speed core". The idea was you put supply and ground on those two, and laminated the rest of the board on outsides. I attended a seminar on it, curious as to why this would be a good solution when embedded caps were coming on line--clearly polyimide, with a dielectric constant of a bit over 3, is not going to get you a boatload of capacitance. The reply was that inductance between power and ground actually has a larger effect than the addition of capacitance--and they had some papers to back that up (Sorry, I don't have copies, but I'll bet you can find info on this if you look around.)



The actual amount of capacitance you can get with embedded capacitors isn't huge. After all, it would be pretty surprising if the relatively crude construction techniques in pcb construction could approach a purpose-made capacitor having far fewer constraints. But most of the embedded capacitor solutions are similar to the DuPont product in that they keep the distance between power and ground minimal to get rid of inductance.



How much capacitance do you need? The answer is very simple: Since most of everything we design is digital, and since 99.999% of digital consists of MOSFETs used as switches, you simply evaluate how many of these are switching at the same time and design in enough capacitance that it won't cause any of the power supply specifications to be violated. Very simple concept, but entirely impractical to calculate due to the unknowns of the internal workings of the logic parts. So you either put the amount of capacitance in recommended by the manufacturer, or you take a guess based on past experience, or you start with what is recommended and then yank parts off until the noise on the power supply is too high.



Also, you can put plenty of capacitance in and then connect to it badly. The ultrathin core technology makes it a bit easier to connect to it correctly.



As you guessed--no easy answer!



Wayne



-----Original Message-----

From: TechNet [mailto:[log in to unmask]] On Behalf Of Peter G. Houwen

Sent: Thursday, June 15, 2017 12:21 PM

To: [log in to unmask]

Subject: [TN] Diving into Embedded Capacitance



(maybe)



We're embarking on a new design that appears to be a great candidate for embedded capacitance (mixed high speed & RF).  We've never used it before.  Because this project will be very high profile within the company, and we have a very condensed development schedule, I don't want to introduce risk that can't be managed.  My theory is that we already have a high risk of not passing FCC for radiated emissions, EC might be a lesser risk as the minimized harmonics will be a great help.



But I don't know HOW risky it is.  What if I don't have space for all the caps we left off counting on the EC?  Is there a way to calculate what caps CAN be safely removed?  Is the capacitance benefit often theoretical, or always real world?



I'm kind of sticking my neck out here, I'm just not sure how safe that might be.



Thanks!



Pete


ATOM RSS1 RSS2