TECHNET Archives

March 2017

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
John Maxwell <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, John Maxwell <[log in to unmask]>
Date:
Tue, 21 Mar 2017 12:22:56 -0400
Content-Type:
text/plain
Parts/Attachments:
text/plain (173 lines)
The CIV of Paschen’s Minimum is 327V and a minimum gap of about 7u if memory serves. There are two types of discharges, short duration a few nS in duration with charge transfers <100pC and streamer discharges like a tornado with charge transfers >100pC. Those are the bad ones as that plasma rapidly erodes polymers.  Solder masks should not be used for insulation and I believe that is topic covered in one of the IPC documents covering PWB’s and that includes parylene. 

John
> On Mar 21, 2017, at 11:35 AM, Giamis, Andy <[log in to unmask]> wrote:
> 
> Thanks Ahne.
> So hypothetically, in the absence of burrs, edges or sharp points that could tear into the insulation, I suppose a corona could form with very narrow gaps and very high voltages.  I imagine it could be made worse if you start with an incomplete polymerization.
> 
> 
> 
> -----Original Message-----
> From: Ahne Oosterhof [mailto:[log in to unmask]] 
> Sent: Tuesday, March 21, 2017 10:16 AM
> To: 'TechNet E-Mail Forum' <[log in to unmask]>; Giamis, Andy <[log in to unmask]>
> Subject: RE: [TN] WG: [TN] Screen On Insulation
> 
> The high field strength allows corona to develop and corona "eats" plastic materials. Therefore no sharp ends on high voltage components and no sharp corners in high voltage conductors !!!!!!!!
> 
> Experience is a very strict task master,
> 
> Bin der, done dat,
> Ahne
> 
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Giamis, Andy
> Sent: Tuesday, March 21, 2017 8:03 AM
> To: [log in to unmask]
> Subject: Re: [TN] WG: [TN] Screen On Insulation
> 
> That's very interesting Carl. 
> 
> I have never considered a polymer degrading and breaking down as a result of electric field strength.  I suppose it is possible.  What did it look like.  What led you to that conclusion?  
> 
> Thanks,
> Andy
> 
> 
> 
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Carl Van Wormer
> Sent: Tuesday, March 21, 2017 8:46 AM
> To: [log in to unmask]
> Subject: Re: [TN] WG: [TN] Screen On Insulation
> 
> My experience with safety regulation electrical spacing has always required guaranteed distances and multiple barriers.  For example, where a plastic spacer/insulator had pin-hole fault possibilities, a double layer was required.  I would be concerned about a cleanliness fault (a chunk of debris, a protrusion from a mechanical impact, or a filament of PCB edge fiber) preventing a thin-layer applied coating from achieving its nominal protection characteristics.  I have seen double layer spacing requirements met by a notch in the PC board with an inserted Kapton shield.  
> Also, beware of sharp edges and corners in HV environments.  I had one product fault that resulted in long-term (after 1-year) dielectric break-down of an insulated video HV anode wire near a sharp sheet-metal edge.  The electrical field strength is related to inverse radius of the physical elements.  The silicone wire insulation broke down because of the field strength, not because of abrasion from the sharp edge.
> 
> Later,
> Carl
> 
> 
> Carl B. Van Wormer, P.E., AE7GD
> Senior Hardware Engineer
> Cipher Engineering LLC
>    21195 NW Evergreen Pkwy Ste 209
>    Hillsboro, OR  97124-7167
>    503-617-7447x303
>    [log in to unmask]     http://cipherengineering.com
> 
> 
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Torsten Hagge
> Sent: Tuesday, March 21, 2017 2:49 AM
> To: [log in to unmask]
> Subject: [TN] AW: [TN] WG: [TN] Screen On Insulation
> 
> Hi Bob,
> 
> parylene is closed at about 0,6µm, so at 1 mil you have a safety margin of about 4200 %.
> 
> We have payed about 1500€ for a batch of 32pcs bio sensor PCBs with 40mm diameter...
> 
> Take care,
> Torsten
> 
> 
> Best Regards
> 
> KRISTRONICS GmbH
> 
> Dipl.Ing. (FH) Torsten Hagge
> team leader HW development
> Gewerbegrund 5-9
> 24955 Harrislee
> Telefon +49 (0) 461 7741-624
> Telefax +49 (0) 461 7741-642
> [log in to unmask]
> www.kristronics.de
> Place of jurisdiction: Flensburg, commercial register: HRB 1433 FL CEO Dipl.-Ing. oec. Thormod Ohm VAD-Id DE 811182059 Bank account: Deutsche Bank AG Flensburg, account 4216610, bank number 21570011
> IBAN: DE32 2157 0011 0421 6610 00, BIC: DEUT DE HH 215  Please consider the environment before printing this e-mail
> 
> 
> 
> 
> -----Ursprüngliche Nachricht-----
> Von: Robert Kondner [mailto:[log in to unmask]]
> Gesendet: Montag, 20. März 2017 17:06
> An: 'TechNet E-Mail Forum'; Torsten Hagge
> Betreff: RE: [TN] WG: [TN] Screen On Insulation
> 
> Torsten,
> 
> Do you know how thick a parylene coating is? My recollection is pretty thin.
> 
> So I checked, very high dielectric strength, thickness typically under 1 mil but it can be built up further with longer processing time.
> 
> Any idea wat coating with parylene cost for a small batch of boards?
> 
> Thanks,
> Bob Kondner
> 
> 
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Torsten Hagge
> Sent: Monday, March 20, 2017 9:17 AM
> To: [log in to unmask]
> Subject: [TN] WG: [TN] Screen On Insulation
> 
> Hi,
> 
> cheap solution could be a 1mil kapton tape with the mention risk of air gaps, fine and cost expensive solution parylene HT  coating before placing the ferrite cores... 
> 
> Take care
> Torsten
> 
> 
> 
> Best Regards
> 
> KRISTRONICS GmbH
> 
> Dipl.Ing. (FH) Torsten Hagge
> team leader HW development
> Gewerbegrund 5-9
> 24955 Harrislee
> Telefon +49 (0) 461 7741-624
> Telefax +49 (0) 461 7741-642
> [log in to unmask]
> www.kristronics.de
> Place of jurisdiction: Flensburg, commercial register: HRB 1433 FL CEO Dipl.-Ing. oec. Thormod Ohm VAD-Id DE 811182059 Bank account: Deutsche Bank AG Flensburg, account 4216610, bank number 21570011
> IBAN: DE32 2157 0011 0421 6610 00, BIC: DEUT DE HH 215  Please consider the environment before printing this e-mail
> 
> 
> 
> -----Ursprüngliche Nachricht-----
> Von: TechNet [mailto:[log in to unmask]] Im Auftrag von Robert Kondner
> Gesendet: Freitag, 17. März 2017 21:11
> An: [log in to unmask]
> Betreff: [TN] Screen On Insulation
> 
> Hi,
> 
> 
> 
> We have a PCB that turns out to require 2500VAC test for 60 seconds and we had some flash over on pads to vias. We also have a planar ferrite transformer with primary windings on one side.
> 
> 
> 
> Does anyone know of a screen on insulation material that can be used to increase flash over voltages? I would like to get a 2 or 3 mils of material.
> My other option is to have a laser cut layer of isolation but that could leave air paths under the material.
> 
> 
> 
> Any other ideas welcome. 
> 
> 
> 
> Thanks,
> 
> Bob K.
> 
> 

ATOM RSS1 RSS2