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Date: | Wed, 21 Dec 2016 07:36:17 +0000 |
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Hi Riccardo:
Yes, you are right. IPC-A-610F-AM1 have stated the requirement you mentioned below. Thanks.
Best regards
Deng
-----Original Message-----
From: Riccardo Inverardi [mailto:[log in to unmask]]
Sent: Tuesday, December 20, 2016 2:30 PM
To: 'TechNet E-Mail Forum' <[log in to unmask]>; Deng RongJun <[log in to unmask]>
Subject: R: [TN] Vertical fill of solder in Supported Holes
Hi Deng, my first ever answer on TN:
You should take a look to IPC-A-610F-AM1 (Dec 2015), where (if memory doesn't fails me) it is stated that the minimum vertical fill for components with less than 14 pins, but with a connection to an inner thermal plane is 50%, provided that a 360° lead-to-barrel wetting is present in the solder source side.
Have a nice day,
--
Riccardo Inverardi
INTEA ENGINEERING
-----Messaggio originale-----
Da: TechNet [mailto:[log in to unmask]] Per conto di Deng RongJun
Inviato: marted́ 20 dicembre 2016 03:01
A: [log in to unmask]
Oggetto: [TN] Vertical fill of solder in Supported Holes
Hi all:
There have a big difference on Vertical fill of solder between
IPC-A-610/J-STD-001 E version and F version. In the F version said that Vertical fill of solder for component with less than 14 leads is 75%, and Vertical fill of solder for component with 14 leads or more is 50% for class 2. But in some case some holes connect to ground plane in many layers, they are very difficult to get 75% vertical fill during wave soldering or hand soldering.
My question are:
How to improve the process to increase vertical fill from 50% to 75% in through holes which connect to many layers?
Why IPC do this change? Why IPC define 14 leads, but not 8 leads or 16 leads?
Best regards
Deng
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