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From:
"Mattix, Dwight" <[log in to unmask]>
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TechNet E-Mail Forum <[log in to unmask]>, Mattix, Dwight
Date:
Thu, 15 Dec 2016 17:35:44 +0000
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A question for the ages.  Been going around that May pole since the very first day I engaged in PWB quality/mfg discussions as a Jr QE.



The right answer is pony up and 100% fill with suitable non-conductive epoxy.



The other answers all have issues.  IMHO, the best of those is one Phil Bavaro (RIP buddy) and I worked through with solder filling open vias that did not bump up on the backside. It was program that ran in production daily for years and we were really after every penny. 



We had a volume pwb supplier (Herco at the time, now long gone, sure miss those folks) that we worked with to dial in a tent breaker s/m opening on the backside.  Those were 10 mil vias in 0.063"

 thick pwbs at the time. 



The aperture imaged was smaller than the plated hole by a couple mils.  That would make for some undeveloped s/m residue at the knee of the hole or up the barrel a little way. It would keep the via from wetting all the way to the back surface. In the case where the barrel walls  was clear of mask residue, the s/m would go right to surface edge of the via on the backside and the meniscus would be concave -- not bumped out.



We quit trying to do that when epoxy fill materials and processes started to mature about 15 years ago. It worked but was a bit finicky.



That typically takes some fiddling to dial in with the specific fabricator you're using and you'll almost certainly lose the recipe when purchasing moves the pwbs for cost savings or the fab changes their s/m process or material. 







-----Original Message-----

From: TechNet [mailto:[log in to unmask]] On Behalf Of Jack Olson

Sent: Thursday, December 15, 2016 8:09 AM

To: [log in to unmask]

Subject: [TN] Plugging Thermal Via Holes with Soldermask?



I'm looking at the various options for tenting/plugging/capping vias in

IPC-4761 (Via Protection Guidelines). None of the options seem to address the thermal vias in power pads.

We are trying to

1) have a solderable pad, apply paste on that side (of course)

2) prevent solder from creating bumps on the heatsink side (of course)

3) avoid the cost of plugging/capping



IPC-4671 states that all forms of one-sided via protection are NOT RECOMMENDED.



So here's the question - I know I have seen a picture of a thermal pad in an IPC document where I could see vias with green mask material in them on the paste side (the component side), but the green stuff was only in the holes, which left the thermal pad exposed for soldering.

I don't think this would be called TENTING because there's no mask on the pad. but is this an acceptable practice? Can I instruct a bare board fabricator to put mask in holes from the top side, but keep the pad clear?

(I can't remember where I saw the picture!)



If that's NOT an accepted practice, is there a way to design the hole big enough to plate but small enough to prevent solder flowing through the other side of the board? I couldn't find a discussion of that in the TechNet Archives



thanks,

Jack


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