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December 2016

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Subject:
Re: Plugging Thermal Via Holes with Soldermask?
From:
Dave Schaefer <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Tue, 20 Dec 2016 10:02:48 -0600
Content-Type:
text/plain
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text/plain (12 lines) 
ENIG here as well, no problems noted to date.
Our standard mfg processes include AOI / AXI so all *FN and BGA components are inspected regardless of bare PCB structure.
25% premium seems way out of line unless it is smaller qtys or quick turn proto.

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