Great answer Joyce!

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Yuan-chia Joyce Koo
Sent: Sunday, November 13, 2016 2:40 PM
To: [log in to unmask]
Subject: Re: [TN] Copper to edge distance

http://www.ni.com/tutorial/10580/en/
http://www.edn.com/design/pc-board/4424239/1/PCB-design-basics
https://books.google.ca/books? 
id=AE2sCQAAQBAJ&pg=PA373&lpg=PA373&dq=pwb+layout+principle 
+fundamental&source=bl&ots=FUvYHnIoII&sig=qErfwPcaXT7WeTglhc9ebQg1-
lM&hl=en&sa=X&ved=0ahUKEwiWmrK64qbQAhXs7YMKHfM8DGMQ6AEIMzAF#v=onepage&q=
pwb%20layout%20principle%20fundamental&f=false

depend upon what your application is and what is your material selection and process.  you should get clearly from your pcb vendor the can do and can not do capability matrix before you start layout and define clearance... following the ipc guideline will help you minimize  board iteration... but not necessary prevent failure if your material selection and process is crappy... the ipc2221 assume best practice the case in industry... the setting sometimes based on round robin test, some times based on lesson learned prior industry data and majority of equipment and material sets at defined platform, (such as normal line/space and HDI for example).  to understand that.  you might want to take course ipc provide or better, attend some electronic packaging course at university, such as... http:// www.prc.gatech.edu/  make sure you consider 3D structure as well, not just board edge clearance... (few newbies usually forget the z- direction...).
good luck.
         jk
On Nov 13, 2016, at 5:14 PM, Yehuda Weisz wrote:

> Hello  Technetters,
> For the beginning of the week I have a question to you that occupies 
> me more and more lately, and it concerns one of the design guidelines 
> - "distance of copper to edge".
>
> IPC-2221 specifies the minimum distance by design as 20 mils and 
> raises this value as the voltage drop increases.
> Well, as PCBs become more and more dense, it becomes a very 
> challenging task to convince designers to give up real-estate along 
> the edges of the board.
> Their claim - if the manufacturer can work with a tolerance of
> +/-0.1mm, why
> do I need to keep a clearance of 0.5 mm along the edges.
> Most of the boards we are dealing with are for high reliability 
> customers (class 2, class 3 type guys) and from what I have heard from 
> other designers
> - no one goes below 20 mil. Some even keep a minimum of 40 mil along 
> the edges.
>
> So - my question to you is simply - WHY ???
> Why did the spec. call for 20 mil minimum clearance??
> I do give reasons to the designers, involving reliability and so on 
> but I feel that I might be missing the real point (or the fundamental 
> reason).
>
> Could any/some of you, knowledgeable people, help me out on this??
>
> Thanks,
> Yehuda Weisz