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November 2016

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Subject:
From:
Jose A Rios <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Jose A Rios <[log in to unmask]>
Date:
Fri, 11 Nov 2016 20:17:58 +0000
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Possible root causes (seen 2 of the 3 in actuality); It could be isolated thin areas of plating that didn't hold up to thermal stress (requires DPA to diagnose), or plated copper properties (low elongation, less likely IMO). I've also seen where ICT covers nets that aren't part of the bare board electrical test (IPC bare board net listing). In the case of the latter, it could mean there is partial plating voids (as plated), not induced by thermal stress. I've seen this (rare), on 30:1 aspect ratio boards with 10-12 mil drilled holes with a 60K or so hole count so 1 hole out of hundreds of thousands in a lot, can have a single partial void thats hard to detect. 

Sent from my iPhone

> On Nov 11, 2016, at 2:14 PM, Steve Golemme <[log in to unmask]> wrote:
> 
> We have a couple of expensive first time build boards that failed ICT in
> assembly due to what appears to be cracked vias. Adding solder to the via
> hole seems to fix the issue.
> 
> What are folks thoughts on plugging vias with solder to fix them? What
> risks are we taking by adding solder vs another technique? Could folks
> recommend alternate repair techniques that may provide better
> thermal/vibration?
> 
> Also, I'd love to hear up alternate possible root causes? This problem
> screams insufficient plating during fab or thermal shock during assembly,
> but I'd like to investigate all possible failure modes. This is a
> multi-layer double sided SMT + wave rigid-flex PCB and the cracking is on
> the rigid portion.
> 
> Thanks,
> Stephen Golemme
> Manufacturing Engineer, Makani
> 650-214-5647
> solveforx.com/makani

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