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From:
"Stadem, Richard D." <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D.
Date:
Tue, 20 Sep 2016 17:04:31 +0000
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Correct. I do not know of any hi-rel programs that allow anything less in the contract. Occasionally there are un-inspectable portions of a design, but even those require qualification by implication and a frozen, locked-down process.

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Carroll, Thomas A
Sent: Tuesday, September 20, 2016 11:25 AM
To: [log in to unmask]
Subject: Re: [TN] J-STD-001 Space Addendum

You are dealing with space hardware, 100% inspection is required.

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Jose A Rios
Sent: Tuesday, September 20, 2016 12:14 PM
To: [log in to unmask]
Subject: Re: [TN] J-STD-001 Space Addendum

What I meant is that when placing replicate devices from the same lot across a pwb during assembly, the cleaning, the paste screening process, reflow process, etc is common to that pwb, hence lending itself to sampling.

> On Sep 20, 2016, at 11:45 AM, Mattix, Dwight <[log in to unmask]> wrote:
> 
> Re: "...the processing of the board is the same for the entire PWA??"
> 
> Is that the only factor to ponder?
> It would seem to be a first order effect to be sure. 
> 
> What about other inputs? E.g.
> Variability in surface factors affecting wetting:
>  - solderable finish variance from pwb to pwb?
> - Variability in surface cleanliness from pwb to pwb, different lots of pwbs
> - variability in component lead's finish and wettability, different component lots
> 
> 
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Stadem, Richard D.
> Sent: Tuesday, September 20, 2016 6:20 AM
> To: [log in to unmask]
> Subject: Re: [TN] J-STD-001 Space Addendum
> 
> Agreed. The cost is neglible.
> 
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of John Burke
> Sent: Monday, September 19, 2016 7:00 PM
> To: [log in to unmask]
> Subject: Re: [TN] J-STD-001 Space Addendum
> 
> Xray every one of them.
> 
> Best regards,
> 
> John Burke
> 
> 
>> On Sep 19, 2016, at 2:52 PM, Joey Rios <[log in to unmask]> wrote:
>> 
>> Sections 7.5.14, 15 and 16 outlines inspection of hidden solder joints, invoking the use of X-Ray in the Space Addendum. The standard does not explicitly prescribe a sampling extent, so, if an assembly has dozens of the same device, like 50-100 say of such devices (such as a bottom termination component) on a single PWA, is the expectation (J-STD intent) that each of the replicate devices are inspected by X-Ray?? Is that what the industry practices, or is sampling commonly invoked, since the processing of the board is the same for the entire PWA??

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