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June 2016

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From:
Mumtaz Bora <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Mumtaz Bora <[log in to unmask]>
Date:
Wed, 22 Jun 2016 13:19:00 +0000
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Hi Richard, Thank-you for  your inputs. Much appreciated.

This is a laminate based QFN, not lead frame, that's why the terminations have Nickel/gold plating. We are checking the Ni/Au plating thickness, grain structure etc. so far it is meeting the IPC 4552 specification of 3-6um Nickel and >0.05 um gold. We will also repeat the solderability test using the Reflow Simulation method.
Regards, Mumtaz
-----Original Message-----
From: Stadem, Richard D. [mailto:[log in to unmask]]
Sent: Wednesday, June 22, 2016 5:32 AM
To: TechNet E-Mail Forum; Mumtaz Bora
Subject: RE: [TN] laminate package wetting issues on ENIG surface

Also, the surface finish may be gold on your QFNs as you noted, but the finish is most likely not actually ENIG as defined in PWB plating specifications such as IPC-4553. The terminations may be  Electroless Nickel with a finish plating of Immersion Gold, but the nickel thickness and the gold finish thickness could  vary all over the place. I would check the component print specifications and perform XrF testing to see what the finish actually is and whether it is compliant to the component drawing. Per J-STD-001 the gold component terminations should be pre-tinned to remove the gold prior to soldering to the assembly. Doing this could greatly improve your solder wetting to the part, especially of the gold is somewhat thick. But if the nickel plating under the gold is not at least 50 uinches thick there may not be enough to solder to. Likewise if the gold finish is less than 2 uinches thick the nickel underneath may have oxidized.
I am not certain that QFNs are normally finished in ENIG, that seems unusual to me, but I could be wrong. My experience is that the plated castellations are usually finished in tin or tin-lead.
Dip-and-look testing is notoriously unreliable as a method of forecasting good solderability in the process. Many dip-and-look test failures solder just fine in actual SMT processing, and many components that pass the dip-and-look test fail miserably in actual SMT soldering. George Wenger's advice to skip the dip-and-look test and perform the actual SMT simulation test is good advice.

I always recommend that if the boards are purchased in a pallet, or if they utilize scored carrier strips along the sides of the board, then have some pads for a couple of chip caps/resistors or a small SOIC designed onto them. That way you always have a set of pads that you can run the board through the oven to perform solderability testing that are truly representative of the pads on the PWB because some boards and components may lose solderability after being stored for long periods of time. That way you have a method of testing solderability using the SMT simulation method years later after the solder coupons are long gone, or perhaps never existed. It costs NOTHING to add the pads to the carrier strips during the initial design, and certainly it costs nothing to have these test pads on the carrier strips. They are there if you need them, but don't affect your process otherwise.
Dean

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Mumtaz Bora
Sent: Tuesday, June 21, 2016 7:44 PM
To: [log in to unmask]
Subject: Re: [TN] laminate package wetting issues on ENIG surface

Hi George,  Thank-you for your comments and feedback.  The solderability test (Dip and Look) was done using flux. The solder paste intended for use in production is eutectic tin/lead. Noted your comments regarding dip and look test. We will follow up with surface mount simulation test.

Regards, Mumtaz

From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Tuesday, June 21, 2016 5:31 PM
To: Forum, TechNet; Mumtaz Bora
Subject: Re: [TN] laminate package wetting issues on ENIG surface

Hi Mumtaz,

Your statements are a little confusing.  You indicated you fail solderability when you Dip-&-Look test the QFN with Sn63/Pb37 solder paste but pass solderability when you Surface Mount Process Simulation test the QFN with SAC305 solder paste.  The Dip-&-Look test is supposed to be conducted by applying flux to the QFN pads and then dipping it into molten solder.  This test is not intended to be done using solder paste.  If you really meant that the QFN fails Dip-&-Look testing with Sn63/Pb37 solder but passes Surface Mount Process Simulation testing with SAC305 solder paste then my comment would be that it is not surprising that the QFN fails the Dip-&-Look testing because this is an inappropriate test for QFN packages.  If you look at Section 5.3 in the JEDEC standard you will see that it indicates "The Dip and Look test is also inappropriate for BGA’s."  This section should really indicate that the Dip-&-Look test is inappropriate for BGS's, QFN's and similar surface mount components.  The solderability failures of these packages is due to physical issues associated with the Dip-&-Look test and not necessarily because the interconnection parts are not solderable.  What I would do is to perform a Surface Mount Process Simulation test on the QFN using Sn63/Pb37 solder paste and I think you will see that the results will be completely different then the Dip-&-Look test.

Regards,

George

George M. Wenger
Failure Signature & Characterization Lab LLC
609 Cokesbury Road, High Bridge, NJ 08829
(908) 638-8771 (Home) (732)-309-8964 (Cell) [log in to unmask]<mailto:[log in to unmask]>

________________________________
From: "Mumtaz Bora" <[log in to unmask]<mailto:[log in to unmask]>>
To: [log in to unmask]<mailto:[log in to unmask]>
Sent: Tuesday, June 21, 2016 7:42:26 PM
Subject: [TN] laminate package wetting issues on ENIG surface

Hello Technet team,

We have a laminate based QFN package with ENIG plating on terminations.   Using lead based paste Sn63/Pb37,  we fail solderability test per JESD22B102E (dip and Look test) and also per J-STD-002 method B (dip and Look test). However,  we passed reflow solderability test using  lead free paste (SAC 305) per method JESD22B102E . Due to product requirements, we have to use eutectic Sn63/Pb37 solder paste.  The reflow oven is convection air . If anyone had this issue and can share some insight or inputs will be  much appreciated.


  Thank-you,
  Mumtaz
858-795-0112

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