IPC-A-610-F Table 7-4 Line C states: "Percentage of land area covered with wetted solder on solder destination side (see 7.3.5.3)" = 0% for all classes.
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-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Jack Olson
Sent: Wednesday, March 16, 2016 2:25 PM
To: [log in to unmask]
Subject: Re: [TN] Hole Fill and Thermal Relief
no, I'm not referring to vias.
I'm trying to solder a connector into plated through-holes.
IPC-A-600 7.3.5.1 allows a partial fill, see Figure 7-84
In the next section
IPC-A-600 7.3.5.2 requires wetting on the DESTINATION side which implies the hole is FULL of solder
How can you have ANY destination side pad wetting on a PARTIALLY filled (but still ACCEPTABLE) hole?
Those two seem incompatible, so I'm sure I'm misunderstanding.
What's worse is Figure 7-91, which shows a solder joint not wetted to the lead.
How could you ever know how far down the UNWETTED portion extends into the hole?
(It IS labelled as a defect, I agree, but it still might be 75% wetted down the barrel) So you have a 360 degree wetted pad labelled as a defect because you can see the unwetted lead, but how can you APPROVE a 75% filled hole that you CAN'T see if it is wetted or not?
Jack
On Wed, Mar 16, 2016 at 2:57 PM, <[log in to unmask]> wrote:
> you mean something like this?
>
> http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Module
> s/XLamp/XLamp%20Application%20Notes/XLamp_PCB_Thermal.pdf
>
> filled via vs partially filled do have difference. you might need
> x-ray inspection... my 1.4 cents.
> jk
> > Maybe I should know better than to ask two questions in the same
> > email, but they're related...
> > I got into a discussion about the hole fill requirement for some
> > large through-hole power devices and connectors. The supplier is
> > worried about using a "percentage" hole fill measurement, because he
> > says that even if the hole is 75% full (or whatever percentage we
> > want to use) the hole
> wall
> > will not be WETTED 75%. He maintains that the cold solder can extend
> > up farther than the actual portion that makes a good joint. So he is
> > looking at the TOP PAD WETTING for verification of a good solder
> > joint, even though we don't require it.
> >
> > Q1) It seems like an inspection procedure looking for WETTING
> > instead of HOLE FILL is not what is intended in IPC, but does he
> > have a point? The hole fill problem is with Selective Soldering, not
> > Reflow
> >
> > Q2) Wanting to provide bare board designs using good DFM practices,
> > I would be willing to reduce my thermal spoke widths so the solder
> > will flow better, but I can't find a calculation that would tell me
> > what I need for something like 10A. There is nothing about this in
> > the IPC-2152 Current Carrying standard. Is there a rough guideline I
> > can use for current through planes using thermal relief??
> >
> > thanks
> > Jack
> >
> >
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