The standard requires the solder be wetted to the lead and the PTH.
On Mar 16, 2016 3:30 PM, "Jack Olson" <[log in to unmask]> wrote:

> I posted this to IPC TechNet, but I think many people are busy at APEX this
> week:
>
> -=-=-=-
>
> Maybe I should know better than to ask two questions in the same email, but
> they're related...
> I got into a discussion about the hole fill requirement for some large
> through-hole power devices and connectors. The supplier is worried about
> using a "percentage" hole fill measurement, because he says that even if
> the hole is 75% full (or whatever percentage we want to use) the hole wall
> will not be WETTED 75%. He maintains that the cold solder can extend up
> farther than the actual portion that makes a good joint. So he is looking
> at the TOP PAD WETTING for verification of a good solder joint, even though
> we don't require it.
>
> Q1) It seems like an inspection procedure looking for WETTING instead of
> HOLE FILL is not what is intended in IPC, but does he have a point? The
> hole fill problem is with Selective Soldering, not Reflow
>
> Q2) Wanting to provide bare board designs using good DFM practices, I would
> be willing to reduce my thermal spoke widths so the solder will flow
> better, but I can't find a calculation that would tell me what I need for
> something like 10A. There is nothing about this in the IPC-2152 Current
> Carrying standard. Is there a rough guideline I can use for current through
> planes using thermal relief??
>
> thanks,
> Jack
>
>
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