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Subject:
From:
"Nutting, Phil" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Nutting, Phil
Date:
Fri, 5 Feb 2016 16:12:47 +0000
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Thanks Ed.

-----Original Message-----
From: Ed Popielarski [mailto:[log in to unmask]] 
Sent: Friday, February 05, 2016 10:57 AM
To: TechNet E-Mail Forum; Nutting, Phil
Subject: RE: [TN] developing thermal profile without a populated board

Phil,

We use a predictive software package that works very well. Print, place & probe one side, run it in an "approximate" recipe. The predictive tool needs to know the key parameters, i.e., zone lengths, top, bottom temps, conveyor speed, etc. You then tell it what you'd like the profile to look like, i.e., ramp/soak/ramp to peak, etc. It will give you a few options which you can choose from. These settings usually work the first time, but on occasion, a troublesome board (20+ 2 & 3 oz planes) might need another pass. Repeat for side 2. 

Ed Popielarski
Engineering Manager


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-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Nutting, Phil
Sent: Friday, February 05, 2016 6:42 AM
To: [log in to unmask]
Subject: Re: [TN] developing thermal profile without a populated board

This thread leads me to a slight variation.  We have a 4 layer board, copper planes on both sides with a bunch of 0603 and SOIC components in two small areas and some large ferrite transformers that are about 1 inch square and 1/2 inch high.  I can't believe this would use the same profile.  Do you run this to mount the big parts and follow with a different profile that will reflow just the small parts leaving the big parts untouched?

I'm in disagreement with other engineers on how to handle this.  And no I have not yet looked at the manufacturer's recommended profiles of the important and different parts.  Other fires to put out first.

Also, how do you handle a profile for a batch of ten boards where you don't have the luxury of having a populated test board?  The ten boards could potentially be the run for the entire year.

Phil Nutting

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Yuan-chia Joyce Koo
Sent: Friday, February 05, 2016 9:01 AM
To: [log in to unmask]
Subject: Re: [TN] developing thermal profile without a populated board

all well said.  one addition, check the recommended thermal profile of key components from supplier.  you will have list of different
requirements: process, amplifier, RF etc.  you end up with narrow range of ramp, TAL, plus the board Cu weight, more less you only have to try few conditions within the window (don't forget different surface finishing, that need more or less considered as  well).
as for wetting of the components, if you do have small glass top viewable reflow oven with 5-7 zone (R&D table top), you can see the paste/components reaction under either air or nitrogen condition (provide you have correlation between your production reflow oven and your R&d oven).  if you done homework, it might be able to cut down your DOE.  my 2 cents.  a Lot of work, but pay off in long run (if your product is follow the platform design - with few generation use similar stuff).
         jk
On Feb 5, 2016, at 8:41 AM, David Hillman wrote:

> Hi Tom - well, nothing beats the real board but we often have the same 
> issue. You have a couple of options that have been shown to get you in 
> the right ball park: (1) there is profile software that does a pretty 
> reasonable job of getting a valid thermal profile which you then tweak 
> as you run your first couple of boards; (2) If you add these factors
> together:
> board thickness, total amount of copper weight, component technology 
> type and component density - you should be able to create an initial 
> working thermal profile. I put together a set of "golden" boards 
> reflecting these variables many moons ago, thermal coupled them and 
> recorded their profiles.
> That action provided me a thermal profile comparison window I could 
> then use to estimate what a new design might demand for thermal 
> inputs.
> Over
> time, we have gained enough comparison experience that we can created 
> a thermal profile for a new design that is fairly accurate and only 
> needs small tweaks.
>
> Dave Hillman
> Rockwell Collins
> [log in to unmask]
>
> On Thu, Feb 4, 2016 at 4:49 PM, Tom Gervascio 
> <[log in to unmask]>
> wrote:
>
>> Many times we have to create an oven profile but only have a bare 
>> board.
>> Many times the boards are complex and have many bottom terminated 
>> components on them and wanted to avoid having to guestimate how a 
>> profile for a bare board would actually perform on a populated board.
>> Can't imagine
>> that we are the only persons to face this problem. Wondered how other 
>> users have worked around this problem?
>>
>
>
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