all well said.  one addition, check the recommended thermal profile  
of key components from supplier.  you will have list of different  
requirements: process, amplifier, RF etc.  you end up with narrow  
range of ramp, TAL, plus the board Cu weight, more less you only have  
to try few conditions within the window (don't forget different  
surface finishing, that need more or less considered as  well).
as for wetting of the components, if you do have small glass top  
viewable reflow oven with 5-7 zone (R&D table top), you can see the  
paste/components reaction under either air or nitrogen condition  
(provide you have correlation between your production reflow oven and  
your R&d oven).  if you done homework, it might be able to cut down  
your DOE.  my 2 cents.  a Lot of work, but pay off in long run (if  
your product is follow the platform design - with few generation use  
similar stuff).
         jk
On Feb 5, 2016, at 8:41 AM, David Hillman wrote:

> Hi Tom - well, nothing beats the real board but we often have the same
> issue. You have a couple of options that have been shown to get you  
> in the
> right ball park: (1) there is profile software that does a pretty
> reasonable job of getting a valid thermal profile which you then  
> tweak as
> you run your first couple of boards; (2) If you add these factors  
> together:
> board thickness, total amount of copper weight, component  
> technology type
> and component density - you should be able to create an initial  
> working
> thermal profile. I put together a set of "golden" boards reflecting  
> these
> variables many moons ago, thermal coupled them and recorded their  
> profiles.
> That action provided me a thermal profile comparison window I could  
> then
> use to estimate what a new design might demand for thermal inputs.  
> Over
> time, we have gained enough comparison experience that we can  
> created a
> thermal profile for a new design that is fairly accurate and only  
> needs
> small tweaks.
>
> Dave Hillman
> Rockwell Collins
> [log in to unmask]
>
> On Thu, Feb 4, 2016 at 4:49 PM, Tom Gervascio  
> <[log in to unmask]>
> wrote:
>
>> Many times we have to create an oven profile but only have a bare  
>> board.
>> Many times the boards are complex and have many bottom terminated
>> components on them and wanted to avoid having to guestimate how a  
>> profile
>> for a bare board would actually perform on a populated board.  
>> Can't imagine
>> that we are the only persons to face this problem. Wondered how  
>> other users
>> have worked around this problem?
>>
>
>
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