Firstly, a "Thank you" to William Brooks for posing this open ended question and the subsequent informative responses.
Secondly, a comment regarding a statement included in the response from Dave Artman: "… two intelligent people come up with opposing results". When two intelligent people cannot agree on the same answer, they most likely have NOT agreed on the same question. Sort of like the old light beer commercials where the opposing sides were chanting "Tastes great!" and "Less filling".
Thirdly, I agree with the general consensus on "pull back clearance on internal planes" that it depends: Is the board punched, routed, or v-scored for panel removal? Is the net a ground, power, clock, data, reset, LED, etc. In reality, it is very common for us to use a different pull back clearance for different edges of the SAME board. This is due to the fact that some of our panels have a mixture of v-scored and routed board edges.
In summary, open lines of communication with hardware engineers, test engineers, fabricators and assemblers will resolve most PC Board design issues.
Thank you,
Kevin L Seaman, CID - PCB Designer, Principal - Systems Operations - PCB Layout Services
Broadcom Corporation (949) 926-5656
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Peter G. Houwen
Sent: Friday, January 08, 2016 7:26 AM
To: [log in to unmask]
Subject: Re: [DC] pull back clearance on internal planes
Thanks for that post, Jack. It pointed out to me that my calculations allow in some cases to set a clearance below the 2222 requirement. I need to add an "or minimum" to the formula.
Pete
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