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November 2015

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Subject:
From:
Wayne Thayer <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Wayne Thayer <[log in to unmask]>
Date:
Tue, 1 Dec 2015 00:27:01 +0000
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Hi Todd-

Most of the really high density PCB fabricators won't do this. I use "really high" as opposed to "HDI" because HDI was supposed to mean "chips first" techniques and was originally developed at GE.

Besides the reason you've stated below, I've gotten:

-Cap ends up too thin to stop the laser on
-Surface the laser is shooting towards is too unpredictable in terms of flatness or heat sinking capability

Wayne Thayer
________________________________________
From: TechNet [[log in to unmask]] on behalf of MacFadden, Todd [[log in to unmask]]
Sent: Monday, November 30, 2015 8:47 AM
To: [log in to unmask]
Subject: [TN] Stacked Via Reliability Risk?

I have heard that stacking microvias on resin-filled buried vias can pose a reliability risk due to resin expansion at high temperatures, which can cause the copper cap to lift off the buried via, potentially causing an open. Here is one source that describes this risk:


http://pcb.iconnect007.media/index.php/article/66028/reid-on-reliability-lifted-pad-stacked-microvia-failure/66031/?skin=pcb


Nevertheless, this type of construction is plainly sanctioned in IPC-2226 (HDI Type III), so I wonder how serious this risk is, and/or if this is something the IPC-2226 Committee (D-41?) is planning to address.

Does anyone have any experience with or knowledge of this risk? How serious is the risk? Do you have internal rules/guidelines specifically to avoid this structure? (I'm referring only to stacked vias atop resin-filled buried vias; my understanding is that stacked, Cu-filled uvias are not a reliability risk. Correct assumption?)



Thanks in advance,
Todd MacFadden

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