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October 2015

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Subject:
From:
"Thierolf, Chris @ MPSG - SPD" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Thierolf, Chris @ MPSG - SPD
Date:
Thu, 29 Oct 2015 23:43:55 +0000
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I'm seeking some input to a solder condition that gets scrutinized in many directions. For the soldering of a stranded 10-12awg stranded wire to a pierced resistor terminal, a no clean L0 or L1 (RO/RE) flux is used with 63/37 solder. This is a single solder joint on a panel mount resistor, so no PCB involved. Flux residue is observed and assembly rejected by QC but manufacturer claims its no worry, and no clean flux. My observation says it presents no electrical or operational issue, not a violation of J-STD-001, but perhaps a visual issue per IPC-A-610, sec 10.6.4
"Flux residue inhibits visual inspection" if floor inspector claims he cannot see the solder joint clearly, which has occurred. We can state "clean the solder joint" (relatively speaking), but what really is clean in this case? Should we be forced to inspect these joints with 4x mag, as some are doing, or generate a simple guideline that allows residue up to a certain level? What is this level?

I have a picture of a failed solder joint if interested, but not sure where to upload.


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[Disc3.png]
Chris Thierolf
Principal EE and Project Engineer
L-3 Electronic Systems Segment
SPD Electrical Systems
13500 Roosevelt Boulevard
Philadelphia, PA 19116
Phone: (215) 698-6390    Fax: (215) 677-4736


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