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August 2015

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Subject:
From:
Guy Ramsey <[log in to unmask]>
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Date:
Mon, 24 Aug 2015 09:04:22 -0400
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Some years ago I was called to consult with a maker of lighting control
systems. They were committed to continuous incremental improvement. 

There are tools for estimating in process yields described in IPC 9261. 
And in IPC 7912, end item acceptance. These help make apples to apples
comparisons between products with differing levels of complexity, when
produced on the same line. 

The client was not publishing the data, so motivation to stretch the truth
was minimized.  Their lines were running less than 400 DPMO, with some good
work we got it down to 250. 



-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Victor Hernandez
Sent: Monday, August 24, 2015 8:38 AM
To: [log in to unmask]
Subject: [TN] PWB, PCB End Of Line Shorts/OPENS detection/Test

Fellow TechNetters:

   In today's world of High Volume Production.   What is a good YIELD Rate.
Back some 30 years I remember 89 to 92% yield depending on board complexity.
Our AOIs weren't as good and accurate as todays.   I need some kind of warm
and fuzzy number.   We used to put external image numbers on all boards to
help sort repeat images printing anomalies.   What happened to the PERFECT
COUPON that was to HELP solve these type of issues.

   I also see frequent Front to Back cores misregistration!!!!!   What's up
with that anomaly.

Victor,


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