Uff Da!
Some things to consider: the boards can be expected to display some resin recession or deformation, the pads will display some dark brown OSP as well as some copper oxidation underneath the OSP, the solder will de-wet back somewhat from the edges of the pads due to the weakened condition of the OSP which will fail to protect the bare copper underneath, and there may be some warpage of the PWB itself from such a prolonged bake at such high temperatures that surely brought the laminate into the Td range or very close to it.
They should still be good enough microsections to assure the via wall thickness is at least .001", no delamination issues after the solder bath, etc. but I am really not sure what effect these issues could have on impedence testing. The dielectric properties of the PWB laminate will have changed due to the prolonged exposure to the bake; the PWB may have embrittled whether resin-infused FR-4 or polyimide.
But it sounds as if this would be a wonderful worst-case scenario; if they pass then you know the design is pretty robust. Therefore I would simply continue with the understanding some of these factors may exist. You may as well gain as much information as you can. It may be enough.
Dean
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Tuesday, July 21, 2015 9:18 AM
To: Stadem, Richard D.
Cc: [log in to unmask]
Subject: RE: PWB coupon baking
237°C, FR4, LF laminate, (DS7409DV + VLP, 907G8681T and DS7409DVN + VLP, 907G8681U-01).
Victor,
From: Stadem, Richard D. [mailto:[log in to unmask]]
Sent: Tuesday, July 21, 2015 8:58 AM
To: Hernandez, Victor G
Subject: RE: PWB coupon baking
237 deg. C or F? FR-4 or polyimide? Hate to ask, but I am trying to help you.
dean
From: [log in to unmask]<mailto:[log in to unmask]> [mailto:[log in to unmask]]
Sent: Tuesday, July 21, 2015 8:47 AM
To: Stadem, Richard D.
Cc: [log in to unmask]<mailto:[log in to unmask]>
Subject: RE: PWB coupon baking
The temperature is 237° for 24 hrs, the surface finish is OSP, Test Vehicle Impedance Coupon, Small PTH configuration, 25 each . The micro section is for LF Laminate anomalies on Post Thermal Stress, solder float.
Victor,
-----Original Message-----
From: Stadem, Richard D. [mailto:[log in to unmask]]
Sent: Tuesday, July 21, 2015 8:05 AM
To: TechNet E-Mail Forum; Hernandez, Victor G
Subject: RE: PWB coupon baking
What temperature, and what type of finish? Any information on type of PWB (IPC4101 slash sheet info)? And what are they being micro sectioned for? Solderability, BGA solder balls, PWB compliance,.....
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Victor Hernandez
Sent: Tuesday, July 21, 2015 7:56 AM
To: [log in to unmask]<mailto:[log in to unmask]>
Subject: [TN] PWB coupon baking
Fellow TechNetters:
While some PWB coupons, 1"x1"-0.062 " thickness, were left in the BAKING over for an extended period, 24 hrs., prior to Thermal Stress, Solder Float. Is there any exposure with processing these sample for cross section. I realize that if unusual artifacts are visible they could have been induced by the over baking process. I need your input.
Victor,
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