Most JEDEC package definitions can be found athttp://www.jedec.org/sites/default/files/MOIND_DT.pdf free of charge.
Jeffrey McGlaughlin, C.I.D.
Engineering Designer
Battelle
505 King Avenue
Columbus Ohio 43201-2693
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-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ed Popielarski
Sent: Tuesday, March 31, 2015 5:56 PM
To: [log in to unmask]
Subject: Re: [TN] Package Definition
JDEC is the keeper of patterns, but you need to $ubscribe to get the .pdfs
This would be a good start: http://www.intel.com/content/dam/www/public/us/en/documents/packaging-databooks/packaging-chapter-14-databook.pdf
Finally: http://www.lmgtfy.com/?q=bga+patterns
Ed Popielarski
Engineering Manager
970 NE 21st Ct.
Oak Harbor, Wa. 98277
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“It's one kind of victory to slay a beast, move a mountain, and cross a chasm, but it's another kind altogether to realize that the beast, the mountain, and the chasm were of your own design.”
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-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of David Hillman
Sent: Tuesday, March 31, 2015 2:50 PM
To: [log in to unmask]
Subject: [TN] Package Definition
Hi folks - does anyone know if JEDEC (or some other industry association) have a industry recognized definition of Ball Grid Array, Chip Scale Package and Flip Chip style packages? I am looking for some standard or specification that defines these packages as package styles/types.
Dave Hillman
Rockwell Collins
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