just watch out if it is high speed data line... make sure you got good
copper left (and good cross section) after what ever is done.  Not much
tolerance there once you deal with high speed low line width. my 1.6
cents.
            jk
> The photochemical machining industry takes into account the problems with
> etchant puddling so they can make square or even acute angles come out
> like the drawings.  They modify the artwork to increase the "depth" of the
> etchant cut into square or acute corners.  I have never seen printed
> circuit shops go out of their way to modifiy artwork for bends or in
> "corners".  Each photochemical machining shop has its own production rules
> depending on the etchant, the spray characteristics of the etch machine,
> the overhang of the photoresist during the etch process, etc.
>
> The link to their industry association is
>
>  http://pcmi.org/
>
> You can learn a lot about etching, artwork compensation, and spray
> processing of flat sheets from these people.  They have been lurking
> behind the printed circuit board fabrication industry for 40 years - same
> exposure machines, same etch machines, same problems with thin core
> transport, etc.
>
> Denny Fritz
>
> -----Original Message-----
> From: Brian Ellis <[log in to unmask]>
> To: TechNet <[log in to unmask]>
> Sent: Thu, Apr 23, 2015 11:38 am
> Subject: Re: [TN] Teardrops (Cu trace expansion) on thin traces - needed
> for OSP?
>
>
> I don't believe that it is an urban myth. I thought that I had explored
> this
> in my book, but I may be mistaken as I cannot find it! I believe
> that the
> problem is due to the capillary action retaining etchant in the
> acute angle.
> The minute quantity of etchant would quickly become
> exhausted, possibly
> leaving poorly soluble precipitates in the "corner"
> as the pH dropped
> (alkaline etchant) or increased (acid etchant).
> However, this explanation is
> possibly speculative.
>
> On 23/04/2015 18:01, Wayne Thayer wrote:
>> Is that
> crevice corrosion during board fab, or during service life? For years,
>> I've
> been wondering what the "acute angle" avoidance issue was and where it
>> came
> from. Every time I put in an acute angle, it gets under-etched because
>> the
> photomask makes it hard to get etchant into the tip of the notch, so I've
>>
> been ignoring that rule as either an anachronism from some etching process
>>
> used in the 60's or just an urban myth.
>>
>> -----Original Message-----
>>
> From: TechNet [mailto:[log in to unmask]] On Behalf Of David Hillman
>> Sent:
> Thursday, April 23, 2015 10:48 AM
>> To: [log in to unmask]
>> Subject: Re: [TN]
> Teardrops (Cu trace expansion) on thin traces - needed for
>> OSP?
>>
>> Hi
> folks - the problem isn't so much a galvanic corrosion issue but really a
>>
> crevice corrosion issue coupled with plating bath parameter control. The
> NASA
>>
> DoD Lead-free Solder Consortia experienced this issue on a number of its
> test
>>
> vehicles. The problem primarily impacts plated thru hole technology but
> has
>>
> been also observed with surface mount technology. Using teardrop shaped
> pads
>>
> gives the board fabricator a bit more process robustness. I haven't seen
> much
>>
> publication of this issue yet in the public domain but it is a known issue
> in
>>
> the industry for folks using immersion silver surface finishes. Details on
>>
> this issue were documented in the NASA DoD Lead-free Solder Consortia
> final
>>
> report.
>>
>>
>>
>> Dave Hillman
>> Rockwell Collins
>>
> [log in to unmask]
>>
>> On Thu, Apr 23, 2015 at 9:29 AM, Brian
> Ellis <[log in to unmask]> wrote:
>>
>>> The likelihood of electrolytic corrosion on
> a silver/copper couple is
>>> really negligible, because the EMF difference is
> only 0.485 V,
>>> referred to hydrogen equals 0 V. This is insufficient to
> dissociate most
>>> ions.
>>>
>>> On 23/04/2015 15:59, MacFadden, Todd
> wrote:
>>>
>>>> Hello Technet friends,
>>>>
>>>> We are usually asked by our PCB
> suppliers to add teardrops (track
>>>> expansion) to thin traces (<=5mil) at
> soldermask openings. We
>>>> understand the impetus for this on immersion silver
> boards, where
>>>> there is a risk of galvanic corrosion due to Cu-Ag couple at
> the
>>>> soldermask/Cu interface of SMT pads.
>>>>
>>>> But some suppliers also
> ask for track expansion on OSP boards. What
>>>> would be the motivation in this
> case? My understanding is the risk of
>>>> corrosion at the soldermask interface
> on OSP boards is low, even if
>>>> the soldermask undercut is severe. So is
> there perhaps some other
>>>> reliability advantage to having wider copper at
> trace/pad interfaces
>>>> on otherwise thin traces? Do others get this question
> as well?
>>>>
>>>> Thanks in advance for any thoughts or insight.
>>>>
>>>> Todd
> MacFadden
>>>>
>>>>
>>>>
>>>>
>>>>
>>>>
>>>>
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