Hi Todd-

I haven't noticed any corrosion due to surface finish application, ImAg or
OSP. Teardrops help the fabricator meet the IPC requirements for the minimum
amount of contiguous trace making it onto the via pad. Their worst case is
that the drill wanders off in the direction of the trace coming into it. For
class 2 and class 3 you can't have the trace just meeting the plating at the
corner of the through hole--it needs to have some path to the remainder of
the annular ring intact.

Most fabricators only ask for permission to put in the teardrops. I haven't
used one which required us to put them in. Be careful doing this because
sometimes the clearance check misses some problems this can cause (or
whoever does this job forgets to run the clearance check when they're done.
For example, if you pour all around traces and then put in
teardrops/snowmen, you'll get a lot of clearance errors/shorts where the
extra metal gets added. More sophisticated CAD systems can auto-place the
teardrops, and that helps with the error checking when done. But I haven't
seen a CAD system that inherently supports teardrops. By this I mean that
when teardrops get placed, they do it by adding extra traces or pads, which
it is then up to you to manage when you start doing the inevitable
revisions.

The above assumes we're talking rigid boards. Flex is an ENTIRELY different
animal when it comes to this subject, because there's a huge danger of
cracking due to flexure in the vicinity of a soldered pad, so the
teardropping has an active structural requirement.

Wayne Thayer

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of MacFadden, Todd
Sent: Thursday, April 23, 2015 9:00 AM
To: [log in to unmask]
Subject: [TN] Teardrops (Cu trace expansion) on thin traces - needed for
OSP?

Hello Technet friends,

We are usually asked by our PCB suppliers to add teardrops (track expansion)
to thin traces (<=5mil) at soldermask openings. We understand the impetus
for this on immersion silver boards, where there is a risk of galvanic
corrosion due to Cu-Ag couple at the soldermask/Cu interface of SMT pads.

But some suppliers also ask for track expansion on OSP boards. What would be
the motivation in this case? My understanding is the risk of corrosion at
the soldermask interface on OSP boards is low, even if the soldermask
undercut is severe. So is there perhaps some other reliability advantage to
having wider copper at trace/pad interfaces on otherwise thin traces? Do
others get this question as well?

Thanks in advance for any thoughts or insight.

Todd MacFadden






______________________________________________________________________
This email has been scanned by the Symantec Email Security.cloud service.
For more information please contact helpdesk at x2960 or [log in to unmask]
______________________________________________________________________