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From:
"Stadem, Richard D." <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D.
Date:
Tue, 21 Apr 2015 16:52:16 +0000
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Yes, of course, that is generally accepted. I was simply pointing out that the Fab drawing supersedes all requirements in the standards. Usually it is defined on the fab drawing as "to meet IPC-6012 except......." or something to that effect. If there are design requirements that are more stringent, that is what the fabricator must be able to meet.
So in the case of the breakout, local breakout requirements may be more stringent than what the feature tolerance implies.

-----Original Message-----
From: Cables, Tim [mailto:[log in to unmask]] 
Sent: Tuesday, April 21, 2015 10:01 AM
To: Stadem, Richard D.; TechNet E-Mail Forum
Cc: 'Vargas, Stephen M'; Deehr, Mark; Donkle, Steve
Subject: RE: Tooling hole to Artwork tolerance

Rich, 	
	Steve in MA wrote " IPC -2222, Section 9.1.5 addresses pattern tolerances relative to datum points, this may be of value to you...". While not specific to Tooling holes and artwork does define artwork to Datum of which a tooling hole Datum could be used. The fab drawing in its entirety is what is necessary as each of these features interact.
Thanks,

Tim Cables
PCB Design

Aclara
440.528.7447 


-----Original Message-----
From: Stadem, Richard D. [mailto:[log in to unmask]] 
Sent: Tuesday, April 21, 2015 10:50 AM
To: TechNet E-Mail Forum; Cables, Tim
Subject: RE: Tooling hole to Artwork tolerance

Outside of what Wayne discussed (and a good posting it was!), for other feature's tolerance, I don't think there is any hard and fast requirement in the standards. The rest of the tolerances are controlled by the fabrication drawing for the PWB and can vary according to the design. This would include dimensional tolerances for locations of drilled holes with respect to X, Y datum reference points (as specified in the drill table on the PWB fab drawing), fiducials, artwork, etc. For a Class 1 PWB the tolerances might be much more than those for a Class 3, but even then not necessarily so. It all boils down to what the designer and the customer require for full functionality and whatever level of reliability limitations they can live with (or not).

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Cables, Tim
Sent: Tuesday, April 21, 2015 9:16 AM
To: [log in to unmask]
Subject: Re: [TN] Tooling hole to Artwork tolerance

Thanks, Wayne,
	If anyone has any other thoughts on this please comment.
Regards
Tim Cables
PCB Design

Aclara

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Wayne Thayer
Sent: Tuesday, April 21, 2015 10:05 AM
To: [log in to unmask]
Subject: Re: [TN] Tooling hole to Artwork tolerance

Hi Tim-

This is a derived specification. The PCB fabricators understand this as requirements on the annular ring of a drilled and plated through hole. Look up stuff related to "break-out". I think Class 2 requires no more than 90% breakout, but many customers separately specify "NBO" for No BreakOut.
There's really not much of a difference between these if you're a fabricator, as long as "teardrops" or "snowmen" are allowed on the artwork.

Anyway, the breakout spec controls the total mis-alignment between the drilling process and final conductor formation process (be that etching or additive plating). If the tolling holes/artwork are too mis-aligned, the fabricator won't make the breakout spec. 

Sophisticated board designers know this inherently, so if they want a board to have high accuracy of artwork to tooling holes, they'll have some plated through holes with whatever minimum annular ring the PCB fabricator will commit to.

Wayne Thayer

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Cables, Tim
Sent: Tuesday, April 21, 2015 9:46 AM
To: [log in to unmask]
Subject: [TN] Tooling hole to Artwork tolerance

Can anyone tell me what the IPC spec is for this and which standard it is listed in?


Tim


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