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March 2015

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From:
"Stadem, Richard D." <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D.
Date:
Tue, 3 Mar 2015 15:34:00 +0000
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You did not read my post, apparently. I stated that requirements for coating (and keep-out areas as well) have historically always been part of the assembly drawing notes. 
The requirements for coating the edges are dependent on the type of PWB, the type of singulation, and the type of use. All of these are AABUS, and controlled through the assembly drawing.
Only the design office can determine if the edges of their CCA require coating, or not. It could be a requirement, or it may not be a requirement for reliability and operational performance for that particular assembly.

Standards cannot specify application, only how it should be done and acceptance criteria if it is.
dean

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Dale Ritzen
Sent: Tuesday, March 03, 2015 9:07 AM
To: [log in to unmask]
Subject: Re: [TN] Required Conformal Coating of Edges of PCB's

Seriously folks... is this a real or imaginary problem? We have seen both "yes" and "no" opinions over the last several days. Is anyone basing their opinions on a specific standard that states what conditions require the PCB edges to be coated, or is it simply a matter of the customer specifying that requirement on their S.O.W. for the product? Are manufacturers to second guess the customer about the places the product will be used and the environmental conditions it will be placed in that might warrant coating of the PCB edges, or does that really matter anymore with the state of the art PCB manufacturing processes - regardless of the condition of the material left on the edges (with the possible exception of PCBs made of Polyimide materials)?

So far we have seen opinions - not quotes from any standard that covers this. Does that exist, or is it something that the IPC technical committees need to look into for further definition? Sounds to me like it needs some definition in a standard so we all have something to march to...

IMHO,
Dale Ritzen, ASQ CQA
Quality Manager / ISO Management Representative ___________________________ Austin Manufacturing Services ___________________________________________________________________________________________________________________________________________
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-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Yuan-chia Joyce Koo
Sent: Monday, March 02, 2015 5:20 PM
To: [log in to unmask]
Subject: Re: [TN] Required Confromal Coating of Edges of PCB's

also there are cut off edges of the PWB like using shear... really bad with all the fiber glass stick out.... there is not enough coating can fix that... (don't laugh, those are real surprise you get from far)...
         jk
On Mar 2, 2015, at 10:04 AM, Stadem, Richard D. wrote:

> You lost me on that post, Wayne.
> Not sure what you are trying to describe when you talk about drilling 
> thousands of overlapping holes as a method of routing out a PWB?
> The edge-coating being discussed was conformal coating, not plating of 
> the edges?
> Sorry if I am slow on the uptick today.
> dean
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Wayne Thayer
> Sent: Monday, March 02, 2015 8:44 AM
> To: [log in to unmask]
> Subject: Re: [TN] Required Confromal Coating of Edges of PCB's
>
> I feel the need to point out the obvious:
>
> -Suppose we singulated a board by using a pcb drill, drilling 
> thousands of overlapping holes. It's hard to keep drills sharp, so 
> let's assume we just swap out bits after the same number of "hits"
> that we deem the bit good for via hole drilling. Now how 'bout we coat 
> the exposed edge with plated metal, just to make sure that if there's 
> a problem with the drilling/routing process, we have a real good 
> chance of making a short.
>
> Any reason that should be dis-allowed? Try calculating the exposed 
> area on the edge vs. all of the via circumferences you've got!
>
> Therefore, it's ridiculous to specify coating of routed board edges, 
> which if anything, have less potential to damage fiber bundles than a 
> drill. Snapped areas are a different category because drilling/milling 
> has a limited capability to damage the laminate.
>
> Wayne
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Stadem, Richard D.
> Sent: Monday, March 02, 2015 9:26 AM
> To: [log in to unmask]
> Subject: Re: [TN] Required Confromal Coating of Edges of PCB's
>
> Rich,
> In addition to what Dr. Pauls has detailed below, I also want to point 
> out that whether or not any specification "recommends" or "does not 
> recommend"
> coverage on certain areas of components and PWBs, it is the assembly 
> drawing which has historically taken precedence over all standards 
> when it comes to defining conformal coating coverage.
> This is because every assembly and PWB has different design 
> requirements and it would be too difficult to document all of the 
> exceptions to the different rules for each type.
> Many circuit boards are simply blanked out on a press, leaving exposed 
> fiberglass edges, but these are also typically high-volume, 
> low-reliability PWBs used only for consumer electronics. All other 
> PWBs are typically routed or laser cut, and as Doug stated those are 
> typically sealed by the singulation process. Depending on the type of 
> PWB material, the method of singulation, and the application, there 
> may be no need to coat the edges.
> Or there might be, but then one would expect this to be detailed as 
> part of the assembly requirements on the drawing.
>
> dean
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Douglas Pauls
> Sent: Sunday, March 01, 2015 8:07 PM
> To: [log in to unmask]
> Subject: Re: [TN] Required Confromal Coating of Edges of PCB's
>
> Rich,
> MIL-I-46058 is simply a materials qualification document.  It does not 
> address the coating of board edges.  I would disagree with Graham and 
> I do not believe that conformal coating edges of boards is a value 
> added process.  Most boards in high performance electronics have 
> routed edges.
> The routing process tends to smear the resin over the glass 
> reinforcement, sealing the edges.  And since most design standards do 
> not allow internal circuitry closer than 25 mils from the edge of the 
> boards, water or external contaminants would have to penetrate 25 mils 
> of epoxy resin to get to circuitry.  If the edges of the boards were 
> sheared or snapped, where the resin did not seal the ends, then 
> perhaps the sealing would be justified.  I can say that Rockwell has 
> coated some board edges and left other edges free.
> We have no field failure, ever, that can be traced to lack of coating 
> the board edges.
>
>
> Doug Pauls
> Principal Materials and Process Engineer Rockwell Collins
>
> On Fri, Feb 27, 2015 at 10:51 AM, Richard Kraszewski < 
> [log in to unmask]> wrote:
>
>> Does anyone recall  which  MIL document calls out the requirement to 
>> cover  the PCB edges of  assemblies?
>> I have been led to believe that one exists but that  more than likely 
>> it is not MIL-I-46058C.
>>
>> Any thoughts??
>>
>> Rich Kraszewski
>> Plexus
>>
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