It didn't take long to relocate IPC 6012 and the relevant chapter and verse, but the display of Altium gerbers remains an issue. I also use the free Lavenir tool - but it can't read Altium's mind any better than I can. Perhaps I missed a chapter in their documentation? Where is IPC 7251/7351 in all this?

Having visually checked fab patterns since the days of tape, film and photo-plots, I've often wondered just how much prior design/fab experience went into most of the layout software the industry has been saddled with. I strongly suspect that vendors still have a photolithographic step in their fab and wonder what the odds are that they're using the same one I'm looking at, after dealing with the same issues.

I can remember, when there was no room for error, sending fabs the actual 2:1 photo-plots, rendered from our art/gerbers, or asking for the vendors' plots to check. Takes time and I can't claim issues couldn't have been spotted in prior steps, but there are still issues with artifacts, layering and electronic display rendering that only the final check can put to rest. It's a simple matter of respecting the designers' and vendors' time and effort.

RL