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December 2014

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Subject:
annular rings on internal layers and check plots
From:
Technet Legg <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Technet Legg <[log in to unmask]>
Date:
Tue, 9 Dec 2014 08:16:00 -0600
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On a multilayer power assembly, I've usually expected annular rings on all plated through hole layers. I've seen SEM images on more complex assemblies where this wasn't the case. Is it unnecessary?
Getting Altium to output a gerber plot for checking, with this copper included, seems to be an issue also. Is there a surefire way of generating scaled WYSIWYG documents?

RL

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