TECHNET Archives

August 2014

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
David Hillman <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, David Hillman <[log in to unmask]>
Date:
Thu, 7 Aug 2014 09:41:45 -0500
Content-Type:
text/plain
Parts/Attachments:
text/plain (26 lines)
Hi Tom - the product design team typically provides a pinhole/void size and
"area of coverage" based on their testing. Basically the drawing has a
value for the amount of "holes" in the solder coverage that relates to  the
amount of shielding they need for the design. If the drawing ins silent on
the topic, then the standard wetting and pinhole criteria for solder joints
is applied. Never too much of an issue provided the fence has good
solderability.

Dave Hillman
Rockwell Collins
[log in to unmask]


On Thu, Aug 7, 2014 at 9:21 AM, Subscribe TechNet Tom Granat <
[log in to unmask]> wrote:

> What criteria do you use to evaluate solder joints on RF fences? IPC 001
> and 610 don't seem to cover this application
>


______________________________________________________________________
This email has been scanned by the Symantec Email Security.cloud service.
For more information please contact helpdesk at x2960 or [log in to unmask] 
______________________________________________________________________

ATOM RSS1 RSS2