Hi gang - the majority of the industry considers the Sn63Pb37, Sn60Pb40 and
Sn62Pb36Ag2 equivalent alloys so the substitution wouldn't be a big deal
reliability wise. However, the potential changes in your stencil process
could be a concern. Investigating solder paste volume changes is a much
less intrusive option to explore.

Dave Hillman
Rockwell Collins
[log in to unmask]


On Thu, Jul 24, 2014 at 4:56 PM, Steve Gregory <[log in to unmask]> wrote:

> Hi Joyce,
>
> Of course you are right, if customer spec'ed the paste then it is carved in
> stone. But maybe they would allow a little leeway with a slight adjustment
> in the alloy...
>
> Steve
>
>
> On Thu, Jul 24, 2014 at 3:33 PM, Yuan-chia Joyce Koo <[log in to unmask]>
> wrote:
>
> > Steve, change paste is a major material change,  it might not flight if
> he
> > does not have design authority even to change the pad layout.  he might
> > need go up to the food chain (i mean - design... that selected
> > material/process and parts).
> > imo.
> >   jk
> > On Jul 24, 2014, at 5:16 PM, Steve Gregory wrote:
> >
> >  Hi again Steve,
> >>
> >> I went back and looked for the thread about 2% silver solder paste and
> >> it's
> >> effect on tomb-stoning. I wanted to find it because I remembered that
> Dave
> >> Hillman gave a very good explanation of why it works, I was able to find
> >> it. Below is the thread:
> >>
> >> Steve Gregory <[log in to unmask]
> >> <http://listserv.ipc.org/scripts/wa.exe?LOGON=A3%
> >> 3Dind0209%26L%3DTECHNET%26E%3D7bit%26P%3D1153010%26B%3D--
> >> part1_cb.280b0562.2ab010a2_boundary%26T%3Dtext%252Fhtml%
> >> 3B%2520charset%3DUS-ASCII>
> >>
> >>> @[log in to unmask]
> >>>
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> >> part1_cb.280b0562.2ab010a2_boundary%26T%3Dtext%252Fhtml%
> >> 3B%2520charset%3DUS-ASCII>>
> >> on 09/10/2002 02:16:08 PM
> >> Please respond to "TechNet E-Mail Forum." <[log in to unmask]
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> >>
> >>> ;
> >>>
> >> Please respond to [log in to unmask]
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> >>
> >>>
> >>>  To:    [log in to unmask]
> >> <http://listserv.ipc.org/scripts/wa.exe?LOGON=A3%
> >> 3Dind0209%26L%3DTECHNET%26E%3D7bit%26P%3D1153010%26B%3D--
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> >> 3B%2520charset%3DUS-ASCII>
> >> cc:
> >>
> >> Subject:    [TN] 2% Silver solder and tombstoning...
> >>
> >> Hi All,
> >>
> >> A while back there was some discussion about 2% silver solder paste and
> >> the
> >> effect it had reducing tombstones with 0402's.
> >>
> >> I was skeptical at first, but I decided to try it on a board we build
> here
> >> that quite often has a problem with 0402's tombstoning.
> >>
> >> To make a long story short, the results were dramatic. Since we've been
> >> using the 2% silver paste on this board, tombstones are a very rare
> >> exception.
> >>
> >> I was asked by a new engineer here why I use 2% silver paste to reduce
> >> tombstoning, I told him because it really works, I seen it work with my
> >> own
> >> two eyeballs. But he asked why does that make a difference? That's where
> >> I'm kind of stuck...I think I remember that it has something to do with
> >> the
> >> 2% paste not really being a true eutectic solder, that it's close, but
> >> there are slightly different temperatures for solidus and liquidous for
> >> that alloy...can anybody educate me again?
> >>
> >> I did a search and found that Senju had done some studies and found that
> >> slight additions of silver and antimony reduced tombstoning to below 10%
> >> of
> >> that which occured with a 63/37 solder. I think it's either AIM or
> >> Multicore
> >> also
> >> sells what's called a low tombstoning alloy as well.
> >>
> >> As always, thanks in advance!
> >>
> >> -Steve Gregory-
> >>
> >> ************************************************************
> >>
> >>  Hi Steve! The differences between Sn63 and Sn62 on the tombstone type
> >> defects is not voodoo but has a science basis. The Sn63 alloy is a
> >> near-eutectic composition with a melting range of slightly above 183C
> >> (183C
> >> to 188C) - most everyone lists the melting point at 183C but only the
> true
> >> eutectic composition (61.9 Sn) really melts at that temperature. Most of
> >> the time this small temperature discrepancy doesn't influence the reflow
> >> process. The surface tension of the Sn63 alloy is 490 dyne/cm. The
> melting
> >> range of the Sn62 alloy is 177C-189C (the alloy is not an eutectic
> >> composition and therefore doesn't melt a one temperature!). The surface
> >> tension of the Sn62 alloy is 376 dyne/cm. And before I get flamed -
> yes, I
> >> know I should be listing the surface tension values at the temperature
> >> they
> >> were measured by I couldn't get my references quite lined up so please
> >> just
> >> take them with a grain of salt!  Now all you have to do apply the solder
> >> alloy properties to the physical phenomena of tombstoning - tombstoning
> is
> >> hugely influenced by the surface tension of the solder alloys and when
> >> melting begins to occur. The Sn62 solder alloy has a slight advantage in
> >> that the initial melting temperature is slightly lower and its surface
> >> tension is lower meaning it will wet surfaces sooner. It's pretty easy
> to
> >> see why some folks favor the Sn62 alloy over the Sn63 alloy. With all
> that
> >> being said, you should consider one alternative avenue - a change of the
> >> component pad geometry also impacts the surface tension forces and could
> >> be
> >> used as a tombstone fix instead of switching solder alloys!  And as you
> >> mentioned - other changes in the solder alloy composition can be used
> too.
> >> I have found that there are two very distinct camps - those who swear by
> >> using Sn62 and those who don't - kinda like Doug and I arguing which is
> >> better Coke or Mt. Dew!  I know lots of folks who use Sn63 and have no
> >> tombstone problems..... and lots of folks who use Sn62 and have no
> >> tombstone problems! Just one of those issues in which you have to look
> at
> >> your processes/pwb pad geometries and decide if a either direction fits
> >> the
> >> way you want to run the solder process. And if you really want to
> >> complicate the process throw in the impact of having a 1206 capacitor
> >> versus a 0402 capacitor (or a mix of both)! Hope this helps (solder
> >> process
> >> are just soooo simple!).
> >>
> >> Dave Hillman
> >> Rockwell Collins
> >> [log in to unmask]
> >> <http://listserv.ipc.org/scripts/wa.exe?LOGON=A3%
> >> 3Dind0209%26L%3DTECHNET%26E%3D7bit%26P%3D1153010%26B%3D--
> >> part1_cb.280b0562.2ab010a2_boundary%26T%3Dtext%252Fhtml%
> >> 3B%2520charset%3DUS-ASCII>
> >>
> >>
> >>
> >> On Thu, Jul 24, 2014 at 1:57 PM, Vargas, Stephen M <
> >> [log in to unmask]> wrote:
> >>
> >>  Hello All:
> >>>
> >>> We are experiencing a high rate of tombstoning on two particular
> package
> >>> styles (0508 and 0612 capacitors) on an assembly here. The rest of the
> >>> board solders at a normal defect rate. Here are some of the things we
> >>> have
> >>> looked at and some aspects of our process:
> >>>
> >>> I've tried using two different profiles (straight ramp to peak and a
> >>> ramp,
> >>> soak, spike).
> >>> I've moved the parts from our high speed chip shooter to our flexible
> >>> placement machine to optimize placement accuracy.
> >>> The pad layout (which is not an option for change due to the product
> >>> having already been qualified by our customer) is very close to the
> >>> manufacturer's recommended layout and the board finish is immersion
> >>> silver.
> >>> We are printing 1:1, no aperture micro-modifications.
> >>> Stencil thickness is 6 mils. I'm concerned about moving to a thicker
> >>> stencil due to having 20 mil pitch parts on the board.
> >>> Our paste is a low residue / pin probe-able no-clean 63/37 (again not
> an
> >>> option for change).
> >>> We also looked at which side of the device is connected to ground,
> >>> assuming that this side of the device would heat up more slowly
> causing a
> >>> tombstoning condition pivoting at the non-ground side. But there was no
> >>> trend indicating that this was the case.
> >>> Solder mask height measured in between the two pads and it was
> determined
> >>> to be at the same height as the pads
> >>>
> >>> I've attached a link to the datasheet for one of the devices for
> >>> reference. I'm wondering if the forces of physics make this part more
> >>> susceptible to tombstoning due to the terminations being on the long
> side
> >>> of the device. Any ideas on how we can improve our yields? Thanks.
> >>>
> >>> http://www.avx.com/docs/Catalogs/licc.pdf
> >>>
> >>> Regards,
> >>> Steve Vargas
> >>>
> >>> If you don't have time to do it right, when will you have time to do it
> >>> over?
> >>> John Wooden
> >>>
> >>> Polaris Contract Mfg Inc
> >>> 15 Barnabas Rd
> >>> Marion, MA 02738
> >>> 774-553-6192
> >>> [log in to unmask]<mailto:[log in to unmask]>
> >>>
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> >>>
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