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June 2014

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From:
Curt McNamara <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Curt McNamara <[log in to unmask]>
Date:
Mon, 23 Jun 2014 20:08:23 +0000
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As others have noted, voltage isolation spacings are defined by Creepage and clearance requirements in the relevant safety standard. 3.5mm seems about right. If you move the traces far enough away in X or Y you should be able to meet the spacing requirements.

As Wayne notes, FR4 is not a consistent insulator, as its' properties vary from build to build (plus there could be copper in there!). 

A PCB could be designed, built, and pass a safety examination with spacing violations (since FR4 will insulate), however each PCB will then need to be hi-pot tested to meet the standard.

		Curt

Curt McNamara, M. Eng. P.E.  //  principal electrical engineer | electrical engineering

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-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Wayne Thayer
Sent: Monday, June 23, 2014 2:44 PM
To: [log in to unmask]
Subject: Re: [TN] z-axis voltage separation

Surface flash and arcing in air are pretty well understood, but there are large fudge factors for shape and humidity and contamination.

Breakover inside a dielectric which isn't fundamentally designed as a high voltage material and consists of a bunch of fibers with resin filler has a bunch of interesting failure modes, some of which take a long time to happen.

As has been suggested, you could get insignificant tiny arcs from fiber to fiber which would eventually result in a "tree-like" failure in the material.

If you need high voltage high reliability in a dielectric, the material has to be qualified via HAST in the usage condition.  Manufacturers do sell pre-qualified materials--FR4 isn't one of them.

So starting with surface flash criteria is one way to look at it, but I think that is pretty darn conservative on it's own.  I wouldn't add extra factors, and you could probably go higher stress than that safely.

But as I previously indicated, go with CAF resistant material and go extremely conservative if there's a plated through-hole near by.

And that's all you get for a nickel!

Wayne

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Robert Kondner
Sent: Monday, June 23, 2014 1:49 PM
To: [log in to unmask]
Subject: Re: [TN] z-axis voltage separation

Ahne,

 You mentioned "I would put in a generous safety factor"

 I have been looking for a realistic "Safety Factor" for some small high isolation voltage coils. Any idea how "Safety Factors" are computed? Are safety factors just wild guesses for engineers to make up themselves?

Thanks,
Bob K.

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ahne Oosterhof
Sent: Monday, June 23, 2014 12:54 PM
To: [log in to unmask]
Subject: Re: [TN] z-axis voltage separation

After a long search,
http://advancedmaterialscience.com/products/NEMA%20FR4.pdf
Dielectric strength:  550 volts/mil

An example (from a vendor).
Semi-Flex FR4, 2 Layers Prototype PCB FR4, 0.3mm Thick Board thickness: 0.3mm Electric strength: >1.3kv/mm

Dupont Pyralux: Dielectric Strength,  ASTM-D-149,  6-7 kV/mil

FR4 is not a homogenous material, so I expect that the dielectric strength for thinner layers will be lower than for thicker layers. And if you measure it, I would put in a generous safety factor.
Many vendors provide some kind of number for dielectric strength, but rarely add the complete description of and conditions under which the material was tested.

If your concern is rooted in safety you will end up testing it yourself for UL (or something like that) approval.

Have fun,
Ahne.


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Jack Olson
Sent: Friday, June 20, 2014 8:38 AM
To: [log in to unmask]
Subject: [TN] z-axis voltage separation

maybe I'm having a "not enough coffee yet" morning, but I was asked how much separation I need between layers for high voltage.
I tried to search the TechNet Archives, but it doesn't seem to work as well as it used to!
anyway,

We have a design that may have 1700V in several places.
Since we are looking at a clearance into the board, layer-to-layer I'm pretty sure I can use the "internal" column B1 of Table 6-1 in IPC-2221 (using Table
6-1 for z-axis was discussed in an IPC committee meeting and no one disagreed)

but the number I get for 1700V is =
(.25 mm for the first 500V) plus (.0025 mm for each of the other 1200V, 3
mm)
equals 3.25 mm

For one thing, it already seems like I'm off-track because .25 for 500V doesn't correspond very well with 3 mm for 1200V, but if you can't trust IPC..... well, let's not go there.

My REAL question is that, although I'm safe using 3.25 mm, my board is not that thick!
Is there a smaller z-axis clearance that can be used for 1700V? across typical
FR4 material?
(we are using a RoHS compatible 170Tg /126)

What's the MINIMUM layer spacing I can use for 1700V?

thanks,
Jack


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