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May 2014

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Subject:
From:
Louis Hart <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Louis Hart <[log in to unmask]>
Date:
Fri, 30 May 2014 22:29:11 +0000
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Ahne and other TechNetters, regarding 'what the drawing states', I recommend board designers follow the practices in IPC-2615, a subset of ASME Y14.5M-1994 (the latest version of which is Y14.5-2009), to define without ambiguity dimensional requirements for an unpopulated printed wiring board.  Louis Hart

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ahne Oosterhof
Sent: Friday, May 30, 2014 12:53 PM
To: [log in to unmask]
Subject: Re: [TN] Misalignment

That rule of thumb does not work well anymore with today's fine pitch components. At 0.125mm (5 mil) per 250mm (10 inch) it means that across a panel, which is typically more than twice that distance, the allowable error would be greater than 0.25mm (10mil). Even for parts with 0.5mm (19.7mil) pitch you would be printing between pads and causing shorts.
If I recall correctly, IPC-2222 suggests image precision on a circuit board should be whatever the drawing states. 
Now the question is: how precise can ecb-s be manufactured and how do the manufacturer and the user verify that the board is meeting a desired/necessary spec?
This can become an issue when depaneling individual boards (how close can you route or cut to the individual board edge) and when procuring a stencil that matches the board or panel.

Ahne. 

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