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Reply To: | (Designers Council Forum) |
Date: | Mon, 24 Feb 2014 19:30:20 -0500 |
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I am re-sending my original response without the images I provided the first time. My response got kicked back due to embedded images. Apparently my message got converted to jiberish, more so than normal!
From: Bowles, Scott @ SSG - PE - FOS
Sent: Monday, February 24, 2014 11:51 AM
To: (Designers Council Forum); Larry Brophy
Subject: RE: [DC] Minimum Via size
Larry,
Table 9-4 that you reference does state the minimum drilled hole size for Blind Vias to be 0.20 mm [.00787 in] but you are talking about a Microvia which is covered in IPC-2221B Section 1.5.1 Microvia. We can all agree that a "Microvia" as shown in Figure 1-1 is a blind via but it has a specific definition and is not controlled by Class (See below). Please note that IPC-2221 is a design standard and not an end performance specification so you should specify to have the product manufactured to meet the requirements of IPC-6012 which has requirements for microvias, e.g., Class 3 plating requirements in Table 3-4 (see below). I agree you should discuss capabilities with your board supplier but IMHO if you meet the requirements in Figure 1-1 you can design and have product built to IPC Class 3 requirements with a 4 mil blind microvia.
IPC-6012B Figure 1-1 deleted
From IPC-6012C-2010:
IPC-6012B Table 3-4 deleted
Scott A. Bowles
Staff Engineer - Printed Circuit Designer IV
Engineering Services
L3 Fuzing & Ordnance Systems
3975 McMann Rd.
Cincinnati, OH 45245
Office: 513-943-2483
Alternate: 513-943-2499
Mobile: 513-208-9009
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Larry Brophy
Sent: Monday, February 24, 2014 11:05 AM
To: [log in to unmask]
Subject: Re: [DC] Minimum Via size
Tom/Robert,
The PCB supplier I use manufactures to class 3 and provides all the documentation, cross sections and solderability sample as required.
They will have no problem manufacturing the PCB but pointed out that a 4mil laser hole wasn't going to pass Class 3.
So basically it's impossible to design a PCB with a high count mirco BGA on it to Class 3?
As you say the rules are the rules, I just though with the way technology is going, this might have been an area that was under review?
Thanks,
Larry
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