Hi Ben,
I tend to agree with you on this.
But the return current does flow in the low inductance plane rather than the
opposite signal trace.
Routing differential signals together will give a higher level of noise
immunity provided there is sufficient separation from other adjacent traces.
Tightly coupled diff pairs are good for short distances where the traces
remain coupled for the entire length but loose coupling, say 4/8
(trace/clearance), is better if the pair have to separate around an obstacle
at some point as the impedance variation is smaller.
Cheers,
Barry
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Ben
Jordan
Sent: Friday, 28 February 2014 5:02 AM
To: [log in to unmask]
Subject: Re: [DC] The real signal flow in differential pairs - referring to
Lee Ritchey's statement
Thanks Rainer,
This is really well summarized piece of research confirmation you have
done.
I think that the reason there's confusion is that the original and only
purpose for a differential transmission line was to create a balanced line
for noise immunity. In analog systems (such as public address audio, or
POTS) using balanced lines is critical for moving sensitive low-voltage
signals through harsh environments without losing information or
significant quality.
Differential signals on a PCB also are differential for noise immunity. The
odd part about this is that the transmitters and receiver circuits do not
terminate the signals the same way as an audio microphone input on a mixing
console (ie. with a transformer), but rather by high-impedance inputs to
logic comparators. Therefore it's not so much a true balanced line but
rather two single-ended lines which are routed side-by-side so that common
mode noise can be easily ignored.
Would you agree also that for EMC purposes differential signals should be
routed as pairs coupled together? Intuitively to me it seems that two equal
and opposite signals traversing the board in far-apart locations will emit
more noise than if they are tightly coupled. Along the same lines - ground
return paths should also be uninterrupted.
Regards,
Ben.
On Thu, Feb 27, 2014 at 10:29 AM, Rainer Thüringer <
[log in to unmask]> wrote:
> *Is it true, that**parallelism is really not required for the two
>> differential traces on PCB routed over a common ground plane?*
>>
>> Lee Ritchey's article "Differential Signal Design" in the PCB Design
>> Magazine from August 2013 has been discussed controversially. Especially
>> his statement "/The property that these two signals have in common is
that
>> they are equal and opposite and they are tightly timed to each other.
>> _Beyond these two characteristics there are no other properties that
matter
>> when a design uses differential pairs_"/has raised the question, if
>> parallelism is really not required for the two differential traces routed
>> over a common ground plane.
>>
>> In my master class on Electronic Design we examined this question by
>> modeling a differential pair of traces over ground with a 3D-Field solver
>> from CST. If Lee's statement is true, the signal flow in each of the two
>> lines should behave independently like two single ended traces. This
>> behavior has been described very vividly by Howard Johnson and Martin
>> Graham in the "Advanced Black Magic" book (chapter 2.3 Transmission line)
>> concerning the return current, building up simultaneously with the signal
>> current in the ground plane underneath as the rising edge propagates
>> through a transmission line.
>>
>> For differential traces over ground there are two options for the return
>> current flow: (1) the return current of each trace flows underneath each
>> trace or (2) the return current will switch over to the inversed trace
>> returning to the driver. In case (1) an orthogonal slot in the ground
plane
>> underneath the trace would disturb each of the 2 signals in case (2) a
>> parallel slot between the 2 parallel traces would do so.
>>
>> Making a long story short, even a wide ground slot of 1mm running
>> parallel between two differential traces with 1mm spacinghas no effect on
>> the return current of each trace. Both return currents are running
>> separately underneath each signal trace, being distorted if a transversal
>> (orthogonal) slot is inserted in ground.The reason therefore is simple:
the
>> return current always takes the path of least impedance which is the path
>> of the smallest loop i.e. underneath each trace. Lee's statement is
>> correct. Nevertheless, for cancelling out ground noise generated by other
>> circuits the two differential traces should be routed over the same
ground
>> area -- but not necessarily _very_ tight together.
>>
>> Having this model in mind, it is also obvious that the current does not
>> go down the signal conductor , reach the end and then begin to make its
way
>> back. Unfortunately Lee's figure 2 (current flow is electron flow) in his
>> article could be misunderstood in that way. If the two lines are
>> substantially different in length or of different impedance both traces
>> must be terminated separately to ground as Lee did explain for the
2.4GB/s
>> case (with a small cap).
>>
>> But independent of the switching problem for the receiver, different
>> trace lengths or impedances (trace width) will generate reflections i.e.
>> EMC problems if terminated by one resistor only rather than two
separately
>> to ground. Using the correct return current model this becomes obvious
even
>> without any receiver. Will say, using the vividly return current model
from
>> Howard Johnson helps understanding the signal propagation in between
signal
>> trace and reference plane, so that design rules i.e. for placing correct
>> return vias can be derived by yourself.
>>
>> Therefore I am using vividly models in my classes at university. On
>> Monday afternoon at APEX you could "*Becoming an EMC Competent Board
>> Designer --- Understanding What Happens rather than Learning Rules (PD
>> 26)". **I am following Einstein's recommendation: Make things as simple
as
>> possible -- but not simpler!***
>>
>> Rainer Thüringer, CID Master Instructor; Member of the IPC-DC Steering
>> Committee
>>
>> Professor for Electronic Design, THM - University of Applied Sciences,
>> Giessen (Germany)
>>
>>
>
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