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December 2013

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Subject:
From:
"David D. Hillman" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, [log in to unmask]
Date:
Mon, 30 Dec 2013 12:07:15 -0600
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Hi Vlad - just so we are all using terms on the same page, per the IPC 
JSTD-002 committee: (1)  Solderability is the ability of a surface(s) to 
be wet molten  solder and is a characteristic of the surface; (2) 
Soldering-ability is the ability to make a solder connection as a function 
of the process parameters. George and Joyce gave good working examples: if 
I can take the QFN off the board and it passes the JSTD-002 testing, then 
you have good solderability but bad soldering-ability.

Dave



From:   "Vladimir Igoshev. PhD" <[log in to unmask]>
To:     <[log in to unmask]>
Date:   12/26/2013 12:19 PM
Subject:        Re: [TN] IPC-A-610E, Voids in Thermal exposed pad of QFNs
Sent by:        TechNet <[log in to unmask]>



Well, in essence a solderability issue as it's about the ability of a
given QFN to be soldered and that ability will depend on the design,
the process etc. In many cases with various components a component
would easily pass the solderability test but fail to be soldered!

And it we won't call those defects 'voiding" then may be everyone will
realize that it's a different type of defect and won't rely on X-ray
trying to capture it.

-- 
Best regards,

Vladimir Igoshev. PhD                          
mailto:[log in to unmask]

SENTEC Testing Laboratory Inc.
11 Canadian Road, Unit 7.
Scarborough, ON M1R 5G1
Tel: (416) 899-1882
Fax: (905) 882-8812
www.sentec.ca

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