Our boards have QFNs and voiding is part of the soldering issue.
We have a solder paste print reduction of 50% from the ground pad to
avoid component float that may result to open solder joint at pins.
We have ground pads design that have vias (11 mils diameter max.) to let
the confined gasses in-between to escape during reflow.
It depends upon how much of the required heat transfer between the
ground pad and the component.
It is with no harm to follow the vendors' recommended footprint design.
We validate our reflow profile to optimize our process.
Ernesto V. Rueda
SMT Process Engineer
Pelco by Schneider Electric
3500 Pelco Way
Clovis, CA 93612
(559) 292-1981
E-mail: [log in to unmask]
www.schneider-electric.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Joyce Koo
Sent: Thursday, December 26, 2013 7:14 AM
To: [log in to unmask]
Subject: Re: [TN] IPC-A-610E, Voids in Thermal exposed pad of QFNs
Usually the center pad got too little paste: the mfg afraid to put too
much paste will "flow" the device and cause parts leveling problems.
Insufficient paste plus un-optimized reflow profile resulted non contact
of solder to the ground pad. You need a good mfg process engineer (plus
a good designer to make sure the reflow profile can be optimized - use a
same generation of components in the design - similar thermal mass). My
1.86 cents.
Product that are built around function alone have not been designed at
all, but merely engineered. -prof. Ashby
Original Message
From: Wenger, George M. [Contractor]
Sent: Thursday, December 26, 2013 9:58 AM
To: [log in to unmask]
Reply To: TechNet E-Mail Forum
Subject: Re: [TN] IPC-A-610E, Voids in Thermal exposed pad of QFNs
Because it is easier to call it a void than to say empty, vacant, blank,
bare, clear, free unfilled, unoccupied, uninhabited. It is an area void
of solder. Everything we've done with QFN soldering suggests that these
"solder void" areas are due to a soldering issue and not a solderability
issue. You can usually take a QFN off that has terrible voiding and do
a solderability test and you find it is solderable which is an
indication that the "voiding" wasn't due to a solderability issue but a
soldering issue.
Regards,
George
George M. Wenger
Failure Signature & Characterization Lab LLC
609 Cokesbury Road, High Bridge, NJ 08829
(908) 638-8771 Home (732) 309-8964 Mobile
E-mail: [log in to unmask]
[log in to unmask]
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Vladimir Igoshev.
PhD
Sent: Thursday, December 26, 2013 9:22 AM
To: [log in to unmask]
Subject: Re: [TN] IPC-A-610E, Voids in Thermal exposed pad of QFNs
I realized that. What I didn't understand was why it was "called"
voiding.
--
Best regards,
Vladimir Igoshev. PhD
mailto:[log in to unmask]
SENTEC Testing Laboratory Inc.
11 Canadian Road, Unit 7.
Scarborough, ON M1R 5G1
Tel: (416) 899-1882
Fax: (905) 882-8812
www.sentec.ca
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