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October 2013

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Subject:
From:
Paul Edwards <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Paul Edwards <[log in to unmask]>
Date:
Wed, 2 Oct 2013 15:39:49 -0700
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Ernesto...

Check to see if your testpoints themselves are clean ... Tarnish issues normally show up on all testpoints and are randomly distributed fails...
Consistant specific fails are normally test pin problems...
Paul

Paul Edwards
[log in to unmask]
Surface Art Engineering


"Rueda, Ernesto" <[log in to unmask]> wrote:


Hi all,

I am seeking recommendations from the experts of this forum about tarnishing of the PCB board finish with Immersion Silver.

Please enlighten me about the minimum thickness of silver metal on top of the copper layer.
What is the maximum process time limitation to build these boards?

Our SMT machine was down for more than 3 days that went through the weekends and the boards were not completed.
It is possible that varying temperature and humidity affected some of the assemblies.
We have problems with testability at some test points because of the tarnishing issues.

We are planning to send out some panels for plating thickness test and contamination tests as well.
Any provider that you may recommend?


Thank you in advance.

Ernesto


Ernesto V. Rueda   |   PELCO by Schneider Electric   |   SMT Process Engineer
Phone: +1 559-292-1981 ext. 3848  |   Fax: +1 559-388-3781  |   Mobile: +1 559-333-3913
Email: [log in to unmask]    |   Site: www.pelco.com   |   Address: 3500 Pelco Way, Clovis, CA  93612-5699 USA
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