hi all, what is the proper configuration of an ipc a/b coupon for layer 1, 
relative to soldermask, given the 2 designs below?? for both, the total 
number of vias in the pwb is in the 10,000 - 11,000 range.
- design 1: 
- 'b' holes only (no 'a' size holes),
- all filled and cap plated,
- on layer 1, 95% of those vias are covered with soldermask, 5% have 
soldermask openings hence exposed thru final finish,
- on the bottom layer, 100% of the vias have soldermask openings
- design 2:
- same as above, except only 0.1% of the vias have soldermask openings on 
layer 1

leave a soldermask opening on layer 1 of the a/b's, or cover them with 
soldermask?? 
include both in the coupon design, at say a 3:4 ratio (given its an a/b 
theres 4 holes, 3 covered with sm, 1 uncovered)?? 
aabus??

Joey Rios
PWB & Process Quality Eng'r
Endicott Interconnect Technologies
1093 Clark St.
Endicott, NY 13760
Office: 607-755-5896; Cell: 607-206-3642

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