Joe, I am not aware of an IPC standard or guidelines on this topic. However, at either the 2010 or 2011 APEX EXPO someone presented a paper on assembly complexity rating. I do not think it was at 2009, but maybe I'm wrong. Maybe that paper would help, or even could be what you are thinking of.  Louis Hart

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Joe Macko
Sent: Tuesday, May 07, 2013 3:03 PM
To: [log in to unmask]
Subject: [TN] populated board complexity rating approach

Technetters,

 

A while back I remember seeing within I think an IPC document an approach for categorizing circuit boards in terms of component density, complexity, size, etc. so one board could be effectively compared against another board(s) as a means to judge say SMT processing differences.  I thought that it was within J-STD-001 but did not see it.

 

Would someone pls help and let me know what IPC doc has such
information.   Thx

 

Regards,

-Joe 

 

 

Regards,

-Joe M.

x3049

 

 


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