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May 2013

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Subject:
From:
Paul Reid <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Paul Reid <[log in to unmask]>
Date:
Mon, 27 May 2013 12:00:45 -0400
Content-Type:
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Hi Inge,

Since Wayne, mentioned IST testing (thank you Wayne) I thought that I would add some thoughts on using the IST method to predict field life.

Jason Furlong (PWB Interconnect Solution) and Michael Freda (Sun, now Oracle) wrote a couple of papers (Advanced testing using real life evaluation and statistical data analysis, and, Application of Reliability/Survivability to Analysis Interconnect Stress Test Data to Make Life Predictions on Complex, Lead-free Printed Circuit Board Assemblies) on estimating the Field Life of PWBs by using IST testing at three different temperatures below the Tg of the material. What they did was to measure IST coupons cycles to failure, on coupons that had a wear out type of failure when tested at 130°C 150°C and 170°C. Base on this data they were able to produce a failure curve that allowed them to estimate the failure rate at the end use environment (for example 65°C once a day).

Subsequent testing demonstrated that this is an accurate method.

What you need to do this type of testing is IST coupons on the production panel. This is a effective method that give you great insight into the general robustness of the product and possible field life of the PWB.

Sincerely,  

Paul Reid 

Program Coordinator  

PWB Interconnect Solutions Inc. 
235 Stafford Rd., West, Unit 103 
Nepean, Ontario Canada, K2H 9C1 

613 596 4244 ext. 229  

Skype paul_reid_pwb 
[log in to unmask] 

 

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Wayne Thayer
Sent: May 27, 2013 10:20 AM
To: [log in to unmask]
Subject: Re: [TN] Difference berween solder float and solder dip

Most others who respond to this group are much more versed in IPC standards than I am.  I do know that when testing out layups it is common to implement an IPC solder float test where a sample is alternately floated on molten solder and then pulled off and allowed to cool for a certain number of cycles, like 3x to 5x.  A nice thing about this test with through holes is that the solder usually wicks into the holes and supports the via barrel during cross sectioning.  This is a stressful test, but doesn't resemble most usage conditions at all.  Running the sample through the reflow process multiple times is much more similar to actual use.  5x reflow suggests a unit can take initial soldering plus a couple of rework cycles.

IST is also a great technique for looking at board structure robustness, but it is expensive to get done and can only be done on a specially designed sample.

While boards which do better on these tests are likely to last longer in the field, there is no simple or direct relationship from results to field life.  To validate field life is another science.

Solder wettabiity by dip testing is something the board assembler cares about, not the reliability guys.

Wayne
________________________________
From: SARAVANAN R [[log in to unmask]]
Sent: Monday, May 27, 2013 8:22 AM
To: TechNet E-Mail Forum; Wayne Thayer
Subject: Re: [TN] Difference berween solder float and solder dip

Dear Mr Wayne Thayer,

Some hi reliability agencies asking for solder dip to test the robustness of the PTH and laminate integrity.
But all the standards talk about solder float & reflow simulation.

I am interested in knowing which is  the robust test ?. What are the difference in stress that the specimen is undergoing the two tests?. regards,

R.Saravanan


________________________________
From: Wayne Thayer <[log in to unmask]>
To: [log in to unmask]
Sent: Sunday, 26 May 2013 11:27 PM
Subject: Re: [TN] Difference berween solder float and solder dip

Hi Inge-

I'm confused!  Is it possible you messed up 1&2?  Testing wettability on components makes sense to me.

I thought float was for seeing how robust the circuit board construction is, although the "popcorn" test was done on components years ago before people knew how dry components needed to be kept.

Wayne
________________________________________
From: TechNet [[log in to unmask]<mailto:[log in to unmask]>] on behalf of Inge Hernefjord [[log in to unmask]<mailto:[log in to unmask]>]
Sent: Sunday, May 26, 2013 7:26 AM
To: [log in to unmask]<mailto:[log in to unmask]>
Subject: Re: [TN] Difference berween solder float and solder dip

Hi Ramakrishnan,

1. Solder dip test tells about  the WETTABILITY.

2. Floating test tells about the ALIGNMENT

Typically 1. is performed on just a few coupons and NO components, while 2.
is done with many coupons (or PCBs) and WITH  components. For getting good
statistics it's not unusual with 10,000 components.

Inge


On 25 May 2013 14:02, Ramakrishnan Saravanan <[log in to unmask]<mailto:[log in to unmask]>> wrote:

> What is the difference between solder dip test and solder float test of
> PWB test coupon. What is the difference in stress levels ?
>
> regards,
>
> R.Saravanan
>


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